1967 International Electron Devices Meeting 1967
DOI: 10.1109/iedm.1967.187830
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Anisotropic etching for forming isolation slots in silicon beam leaded integrated circuits

Abstract: Anisotropic silicon etches which preferentially attack the 100 and 1110) crystal planes have been used to form narrow well-controlled d a t i o n slots in silicon beam-leaded integrated circuits.

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Cited by 12 publications
(5 citation statements)
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“…Anisotropic (crystallographically preferential) etching of (100) orientation Si wafers is widely used to permit close control of lateral etching dimensions in silicon integrated circuits (37,38). Etching solutions and conditions are employed which result in dissolution of the Si in (100) directions at a rate which is several orders of magnitude higher than the rate in the (111) directions.…”
Section: Anisotropic Etching Of Siliconmentioning
confidence: 99%
See 1 more Smart Citation
“…Anisotropic (crystallographically preferential) etching of (100) orientation Si wafers is widely used to permit close control of lateral etching dimensions in silicon integrated circuits (37,38). Etching solutions and conditions are employed which result in dissolution of the Si in (100) directions at a rate which is several orders of magnitude higher than the rate in the (111) directions.…”
Section: Anisotropic Etching Of Siliconmentioning
confidence: 99%
“…A considerable amount of information has been published on the effects of etchant composition, substrate doping level (41,56), and etching conditions on rate of etching of various orientations of silicon (37,40,(57)(58)(59)(60)(61)(62). Anisotropic etching of germanium has also been described (63).…”
Section: Anisotropic Etching Of Siliconmentioning
confidence: 99%
“…Silicon crystal etches 100-200 times faster in the (100) direction than it does in the (110) direction. This is the basis for the anisotropic etch of silicon [62][63][64][65][66][67][68]. Mechanically, the etching procedure is straightforward: …”
Section: Koh Etchmentioning
confidence: 99%
“…The silicon wafer used for this process is cut in < 110 > orientation so that (110) direction is perpendicular to the wafer surface and the (111) direction is along the surface. In this case the advantage is taken of the anisotropic etch of silicon [62], where silicon in the (111) direction etches hundreds of times slower than in the (110) direction in the potassium hydroxide (KOH) solution. The initial pattern is formed in the Poly(methyl methacrylate) (PMMA) electron beam resist, which is then transferred onto the silicon wafer via the Cr lift-o↵ process and the reactive ion etch (RIE).…”
Section: Silicon Templatementioning
confidence: 99%
“…An oxide is grown on the substrate, whose resistivity is determined by the desired collector resistivity, and windows opened by conventional photolithography processing. These windows allow the isolation moats to be etched, usually with an orientation dependent etch which attacks the silicon in the ~1 0 0 ~ direction as much a s 100 times faster than in the ~1 1 1 ) direction (19,(21)(22)(23). Thus the cross section of an etched groove will appear triangular as shown in Fig.…”
mentioning
confidence: 99%