Anomalous turn-on voltage degradation during hot-carrier stress in polycrystalline silicon thin-film transistors

Farmakis, Filippos; Brini, J.; Kamarinos, G.; Dimitriadis, C. A.

doi:10.1109/55.902836

Cited by 73 publications

(48 citation statements)

References 11 publications

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“…Our observation might indicate a transition of the mechanism from reaction limited to diffusion limited when increasing the stress power, thus enhancing the channel temperature rise. Degradation of SS is a consequence of defect generation along the entire channel upon high current stress under SH [17], depending mainly on deep states at the gate oxide/channel interface and/or GBs [5], [14].…”

Section: A General Degradation Characteristicsmentioning

confidence: 99%

“…5). In poly-Si TFTs, µ FE or g m_ max degradation was commonly observed in HC degradation [5], [10]- [12]. Previously, there were observations of an initial increase in µ FE or g m_ max under HC stress due to the channel shortening effect by HC injection into the gate oxide at the drain end [10], [12], [13].…”

Section: B Anomalous Field-effect Mobility Degradationmentioning

confidence: 99%

“…Although excimer laser crystallization (ELC) is currently a widely employed LTPS technology [2]- [5], recently, metal-induced lateral crystallization (MILC) has been demonstrated as a promising LTPS technology with some unique advantages over other techniques [6]. Currently, highperformance polycrystalline silicon (poly-Si) TFTs have been fabricated by using various technologies [6], [7].…”

mentioning

confidence: 99%

“…It is particularly true for MILC TFTs since, up to now, there are still rarely reported studies on their device reliability [8], [9]. It has been identified for poly-Si TFTs that hot carrier (HC) stress [4], [5], [9]- [14] and self-heating (SH) stress [4], [7], [9], [14]- [18] are two key mechanisms inducing device degradation. In this paper, time-dependent SH degradation behaviors of n-type MILC TFTs under different stress powers were systematically investigated.…”

mentioning

confidence: 99%

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Stress Power Dependent Self-Heating Degradation of Metal-Induced Laterally Crystallized n-Type Polycrystalline Silicon Thin-Film Transistors

Wang

Yang

et al. 2007

IEEE Trans. Electron Devices

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Abstract-Self-heating degradation of n-type metal-induced laterally crystallized polycrystalline silicon thin-film transistors is systematically investigated under various stress powers. A two-stage degradation behavior with turnaround effect at the initial stage is characterized. The initial degradation stage is related to breaking of weak Si-H bonds. The floating-body effect by released hydrogen ions is responsible for the observed backshift of the transfer curve during the initial stress. On the other hand, the normal degradation stage occurs by breaking of strong Si-Si bonds and trap generation at grain boundaries (GBs) and the gate oxide/channel interface. Our model is supported by observed different activation energies related to two degradation stages and a direct observation of the continuous increase in GB trap density during the normal degradation. Furthermore, during the normal degradation stage, an anomalous continuous field-effect mobility increase along with its V g dependence shift is first observed. It is clarified that this behavior is not a true channel mobility increase, but a consequence of stress-related trap generation.Index Terms-Field-effect mobility, metal-induced lateral crystallization, polycrystalline silicon (poly-Si), self-heating (SH) degradation, thin-film transistors (TFTs).

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Section: A General Degradation Characteristicsmentioning

confidence: 99%

Section: B Anomalous Field-effect Mobility Degradationmentioning

confidence: 99%

mentioning

confidence: 99%

mentioning

confidence: 99%

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Stress Power Dependent Self-Heating Degradation of Metal-Induced Laterally Crystallized n-Type Polycrystalline Silicon Thin-Film Transistors

Wang

Yang

et al. 2007

IEEE Trans. Electron Devices

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“…It is generally known [8] that hot-carrier phenomena in NMOSFETs occur when devices are biased at high drain voltages and depending on the gate voltage several degradation mechanisms may be activated. Two electric fields are responsible for device degradation: the lateral field at the drain edge, which is enhanced above the pinch-off regime, and the vertical field, that is, the oxide field.…”

Section: Explanation Of V Th and G Mmax Variationmentioning

confidence: 99%

Hot-carrier stress induced degradation of SLS ELA polysilicon TFTs – Effects of gate width variation and device orientation

Kontogiannopoulos

Farmakis

Kouvatsos

et al. 2008

Solid-State Electronics

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A Stacked p‐Type Low‐Temperature Polycrystalline Silicon Thin‐Film Transistor for Future Display Applications

Wang

Tai

Chang

et al. 2022

Adv Materials Technologies

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In this study, a novel structural design of the p‐type low‐temperature polycrystalline silicon thin‐film transistors (p‐type LTPS TFTs) applied to the pixel structure of displays is proposed. Compared to the conventional pixel structure of displays, the proposed architecture can achieve the aperture ratio improvement by stacking the switch thin‐film transistor and the storage capacitor in a pixel region to enlarge the active space. Therefore, the demands of high‐resolution characteristics, such as a high aperture ratio, and high pixel densities for high‐end displays or novel technologies, can be satisfied by the adoption of the proposed design concept. Furthermore, the discussion of experimental and simulated results in terms of device physics of the transistor indicates that proposed TFTs possess higher performance and reliability properties. By modulating the geometry of the drain‐connected bottom metal in stacked TFTs, output characteristics and hot carrier phenomenon in devices can be further improved. Time‐dependent transfer characteristics, extracted electrical parameters, and numerical simulation results are performed to support our design.

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Anomalous turn-on voltage degradation during hot-carrier stress in polycrystalline silicon thin-film transistors

Cited by 73 publications

References 11 publications

Stress Power Dependent Self-Heating Degradation of Metal-Induced Laterally Crystallized n-Type Polycrystalline Silicon Thin-Film Transistors

Stress Power Dependent Self-Heating Degradation of Metal-Induced Laterally Crystallized n-Type Polycrystalline Silicon Thin-Film Transistors

Hot-carrier stress induced degradation of SLS ELA polysilicon TFTs – Effects of gate width variation and device orientation

A Stacked p‐Type Low‐Temperature Polycrystalline Silicon Thin‐Film Transistor for Future Display Applications

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