Application heartbeats for software performance and health

Hoffmann, Henry; Eastep, Jonathan; Santambrogio, Marco D.; Miller, Joel B.; Agarwal, Anant

doi:10.1145/1693453.1693507

Cited by 38 publications

(30 citation statements)

References 14 publications

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“…A similar approach is used in LEAP [14]. Software profiling has been successfully applied in systems with dynamic adaptation capabilities, as it has been shown in [15] and [16].…”

Section: Related Workmentioning

confidence: 99%

Execution modeling in self-aware FPGA-based architectures for efficient resource management

Rodríguez

Valverde

Castanares

et al. 2015

2015 10th International Symposium on Reconfigurable Communication-Centric Systems-on-Chip (ReCoSoC)

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Abstract-SRAM-basedFPGAs have significantly improved their performance and size with the use of newer and ultradeep-submicron technologies, even though power consumption, together with a time-consuming initial configuration process, are still major concerns when targeting energy-efficient solutions. System self-awareness enables the use of strategies to enhance system performance and power optimization taking into account run-time metrics. This is of particular importance when dealing with reconfigurable systems that may make use of such information for efficient resource management, such as in the case of the ARTICo 3 architecture, which fosters dynamic execution of kernels formed by multiple blocks of threads allocated in a variable number of hardware accelerators, combined with module redundancy for fault tolerance and other dependability enhancements, e.g. side-channel-attack protection.In this paper, a model for efficient dynamic resource management focused on both power consumption and execution times in the ARTICo 3 architecture is proposed. The approach enables the characterization of kernel execution by using the model, providing additional decision criteria based on energy efficiency, so that resource allocation and scheduling policies may adapt to changing conditions. Two different platforms have been used to validate the proposal and show the generalization of the model: a high-performance wireless sensor node based on a Spartan-6 and a standard off-the-shelf development board based on a Kintex-7.Index Terms-Self-awareness, dynamic and partial reconfiguration, dynamic resource management, FPGAs.

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“…A similar approach is used in LEAP [14]. Software profiling has been successfully applied in systems with dynamic adaptation capabilities, as it has been shown in [15] and [16].…”

Section: Related Workmentioning

confidence: 99%

Execution modeling in self-aware FPGA-based architectures for efficient resource management

Rodríguez

Valverde

Castanares

et al. 2015

2015 10th International Symposium on Reconfigurable Communication-Centric Systems-on-Chip (ReCoSoC)

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“…ATAC's congestion-free broadcast also enables another form of adaptive, or self-aware, computing: Application Heartbeats [3]. Heartbeats provide a simple programming interface whereby applications publish their performance and system software/hardware can use this information.…”

Section: Programming Modelsmentioning

confidence: 99%

“…Heartbeats provide a simple programming interface whereby applications publish their performance and system software/hardware can use this information. [3] demonstrates the use of heartbeats in an adaptive H.264 encoder to dynamically reduce output quality or increase computational power to meet a throughput goal. ATAC's broadcast network can be leveraged with such an approach, as worker cores would broadcast their heartrate (in this case, frames per second) to a set of external scheduler cores.…”

Section: Programming Modelsmentioning

confidence: 99%

ATAC: Improving performance and programmability with on-chip optical networks

Psota

Miller

Kurian

et al. 2010

Proceedings of 2010 IEEE International Symposium on Circuits and Systems

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Abstract-Given the current trends in multicore scaling, chips with 1000 cores may exist within the next 5 to 10 years. However, their promise of increased performance will only be reached if their inherent scaling and programming challenges are overcome. Meanwhile, recent advances in nanophotonic device manufacturing are making CMOSintegrated optics a reality-interconnect technology which can provide more bandwidth at lower power than conventional electronics. Perhaps more importantly, optical interconnect also has the potential to enable new, easy-to-use programming models enabled by its inexpensive broadcast mechanism. This paper introduces ATAC, a new manycore architecture that capitalizes on the recent advances in optics to address a number of challenges that future manycore designs will face. The new constraints and opportunities of on-chip optical interconnect are presented and explored in the design of ATAC. Furthermore, this paper discusses ATAC's programming models, and introduces Consumer Tagging, a novel programming model that leverages ATAC's strengths to provide high performance and scalability.

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“…• makes use of the Application Heartbeats [6,7] (or simply Heartbeats) to set performance goalsand monitor the progress of the execution; • has knowledge (i.e., static performance, reconfiguration time, etc. .…”

Section: The Proposed Self-aware Adaptive Systemsmentioning

confidence: 99%

“…Extensions of the present work will use the same framework for a multi-core system together with an FPGA, used as external accelerator, where the operating system is executed on top of the multi-core machine and the hot-swap mechanism allows to use the FPGA when needed without modifying the original code. Within this context we will also able to combine multiple effects deriving by the simultaneous usage of different services, e.g., the Implementation Switch Service, the Core Allocator [6], Smartlocks [8].…”

Section: Related Workmentioning

confidence: 99%

Self-Aware Adaptation in FPGA-based Systems

Sironi

Triverio

Hoffmann

et al. 2010

2010 International Conference on Field Programmable Logic and Applications

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Abstract-Self-Aware Adaptive computing systems are capable of adapting their behavior and resources thousands of times based on changing environmental conditions and demands. This allows them to automatically find the best way to accomplish a given goal with the resources at hand. This capability would benefit the full range of computer systems, from embedded devices to servers to supercomputers. Although such a system may seem rather far fetched, we believe that basic semiconductor technology, computer architecture and software systems have advanced to the point that the time is ripe to realize such a system.In this paper we present an implementation of an FPGAbased Self-Aware Adaptive computing system which blends techniques developed in different research fields, i.e, monitoring, decision making, and self-adaptation. The result is a system built on top of a set of enabling technology that proves the effectiveness of using Self-Aware Adaptive computing systems. We used the Application Heartbeats to assess performance goals and to inspect application progress and the Implementation Switch Service to switch between different implementations of the same algorithm (both in software and in hardware) at runtime. Preliminary results show the effectiveness and the usability of the proposed approach.

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Application heartbeats for software performance and health

Cited by 38 publications

References 14 publications

Execution modeling in self-aware FPGA-based architectures for efficient resource management

Execution modeling in self-aware FPGA-based architectures for efficient resource management

ATAC: Improving performance and programmability with on-chip optical networks

Self-Aware Adaptation in FPGA-based Systems

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