Benefits of macro-based multi-FPGA partitioning for video processing applications

Martin-Langerwerf, J.; Reuter, Carsten; Kropp, Holger; Pirsch, P.

doi:10.1109/iwrsp.2002.1029739

Cited by 2 publications

(2 citation statements)

References 5 publications

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“…Hard macros are not new to FPGA design. They have been used, for example, by Martín-Langerwerf et al in [12] to reduce FPGA chip count and synthesis runtime for video applications. The present work employs hard macros for implementing asynchronous primitives, enabling the use of nonsynchronous design techniques in FPGAs in a compact way.…”

Section: The Hard Macro Librarymentioning

confidence: 99%

SCAFFI: An intrachip FPGA asynchronous interface based on hard macros

Pontes

Soares

Carvalho

et al. 2007

2007 25th International Conference on Computer Design

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Building fully synchronous VLSI circuits is becoming less viable as circuit geometries evolve. However, before the adoption of purely asynchronous strategies in VLSI design, globally asynchronous, locally synchronous (GALS) design approaches should take over. The design of circuits using complex field programmable components like state of the art FPGAs follows this same trend. In GALS design, a critical step is the definition of asynchronous interfaces between synchronous regions. This paper proposes SCAFFI, a new asynchronous interface to interconnect modules inside FPGAs. The interface is based on clock stretching techniques to avoid metastability. Differently from other interfaces, it can use both logic levels for stretching and do not require the use of arbiters. Also, compactness of the implementation is enhanced by the use of dedicated FPGA hard macros. A GALS version implementation of an RSA cryptography core demonstrates the use of SCAFFI.

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Section: The Hard Macro Librarymentioning

confidence: 99%

SCAFFI: An intrachip FPGA asynchronous interface based on hard macros

Pontes

Soares

Carvalho

et al. 2007

2007 25th International Conference on Computer Design

View full text Add to dashboard Cite

show abstract

“…FPGAs are great fits for video and image processing applications [5][6][7], such as broadcast infrastructure, medical imaging, high definition video-conferencing, video surveillance, and military imaging. Video and image processing solutions from Altera [7] FPGAs include optimized development tools and kits, reference designs, video compression IP, and interface system IP.…”

Section: Introductionmentioning

confidence: 99%

Real Time Object Tracking using FPGA Development Kit

Tayyab¹,

Qadri²,

Ahmed³

et al. 2014

IJITCS

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Abstract-The main idea of this work is object tracking using real time video processing. For this purpose we designed an embedded system that performs the object tracking algorithm for accurate tracking of defined object. The theme may be implemented for the security companies, sports and the armed forces to make them more equipped and advanced. The heart of the system is a Field Programmable Gate Arrays development kit. It controls the whole system by receiving the video signal from camera, processes it and sends the video signal to the Liquid Crystal Display or monitor. After receiving video of intended object, target selection is performed to select the target to track and then the tracking algorithm is implemented using image processing algorithms implemented using Field Programmable Gate Arrays development kit. We also interfaced the DC gear motor to control the movement of the camera in order to track the selected object. In order to design the standalone application we transformed our algorithm in Field Programmable Gate Array kit.

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Benefits of macro-based multi-FPGA partitioning for video processing applications

Cited by 2 publications

References 5 publications

SCAFFI: An intrachip FPGA asynchronous interface based on hard macros

SCAFFI: An intrachip FPGA asynchronous interface based on hard macros

Real Time Object Tracking using FPGA Development Kit

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