Bonding of 5 <i>μ</i>m Cu-Sn Micro Bumps Using Thermal Reflow and Solid-State Pre-Bonding

Shi, Yunfan; Wang, Zilin; Kang, Jian; Zheng, Kai; Bu, Weihai; Wang, Zheyao

doi:10.1109/tcpmt.2022.3213540

Cited by 2 publications

(1 citation statement)

References 34 publications

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“…It is possible to reduce the bump pitch by PVD method. In the bump fabrication, the PVD and electroplating process can reduce the bump pitch to a minimum of 10 and 20 μm, and the corresponding bump size can be reduced to a minimum of 5 and 10 μm respectively [22][23][24][25][26].…”

Section: Fine-pitch Bump Fabricationmentioning

confidence: 99%

Low-temperature, short-time, wafer-level bonding for Cu/Sn/Cu solid-state-diffusion interconnect in 3-D integration

Li¹,

Wang²,

Li³

et al. 2023

Phys. Scr.

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In this paper, Cu/Sn/Cu solid-state diffusion (SSD) under low temperature is proposed and investigated for three-dimensional (3-D) integration. Cu and Sn films were deposited by high-efficiency and low-cost physical vapor deposition to fabricate 40-µm-pitch daisy-chain structures. Subsequently, the Cu bump surface was treated with Ar (5% H2) plasma. The Cu/Sn/Cu structure was bonded face to face at 200 ℃ for 15 min. The interfacial composition of the as-bonded dies comprised five layers, Cu/Cu3Sn/Cu6Sn5/Cu3Sn/Cu, with no Sn remaining and no overflow. After annealing at 200 ℃ for 15 min under N2 atmosphere, as the Cu6Sn5 completely transformed into Cu3Sn, the microstructure changed to stable three layers: Cu/Cu3Sn/Cu. Additionally, the average bonding shear strength reached 27.0 MPa, which is higher than that for conventional Cu/Sn SSD bonding. The measured bonding resistance value was maintained at the theoretical value. Moreover, the parabolic growth constant of Cu3Sn reached 1.86×10−15 m2/s. Our study demonstrates the feasibility of using Cu/Sn/Cu SSD for low-temperature, short-time, wafer-level bonding.

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