Characteristics of the Fluorinated High-$k$ Inter-Poly Dielectrics

Hsieh, Chih-Ren; Chen, Yung-Yu; Lu, Kwung-Wen; Lin, Gray; Lou, Jen‐Chung

doi:10.1109/led.2010.2074181

Cited by 7 publications

(4 citation statements)

References 10 publications

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“…It has been reported that fluorination improved the quality of interploy high-k dielectrics. 11,12) In this work, an interfacial fluorination approach, which engineers the fluorinion profile at the interfaces of MAHOS memory devices, has been introduced to solve the interface issue. The results of X-ray photoelectron spectroscopy (XPS) revealed that, as shown in the schematic structures of MAHOS memory in Fig.…”

mentioning

confidence: 99%

Effects of Interfacial Fluorination on Performance Enhancement of High-k-Based Charge Trap Flash Memory

Wang

Huo

Liu

et al. 2013

Jpn. J. Appl. Phys.

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The effects of interfacial fluorination on the metal/Al2O3/HfO2/SiO2/Si (MAHOS) memory structure have been investigated. By comparing MAHOS memories with and without interfacial fluorination, it was identified that the deterioration of the performance and reliability of MAHOS memories is mainly due to the formation of an interfacial layer that generates excess oxygen vacancies at the interface. Interfacial fluorination suppresses the growth of the interfacial layer, which is confirmed by X-ray photoelectron spectroscopy depth profile analysis, increases enhanced program/erase efficiency, and improves data retention characteristics. Moreover, it was observed that fluorination at the SiO–HfO interface achieves a more effective performance enhancement than that at the HfO–AlO interface.

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mentioning

confidence: 99%

Effects of Interfacial Fluorination on Performance Enhancement of High-k-Based Charge Trap Flash Memory

Wang

Huo

Liu

et al. 2013

Jpn. J. Appl. Phys.

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“…The slightly lower V T , resulting from the lowering the straininduced conduction band edge, implies a lower STI-induced compressive stress in STI-B devices compared with STI-A devices. 11,12) Figure 3 shows drain induced barrier lowering (DIBL) and subthreshold swing (SS) versus active length. Comparable DIBL and SS characteristics between STI-A and STI-B devices indicate that the improved densification process does not significantly influence the process variations or dopant diffusions of STI-B devices compared with STI-A devices.…”

Section: Resultsmentioning

confidence: 99%

Impact of Reducing Shallow Trench Isolation Mechanical Stress on Active Length for 40 nm n-Type Metal–Oxide–Semiconductor Field-Effect Transistors

Huang

Lin

et al. 2011

Jpn. J. Appl. Phys.

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The electrical potential technique was applied to detect and locate impact damage in carbon fibre reinforced polymer (CFRP) plates of Hexcel T300/914 composite. The potential field across the surface of the laminates was measured using arrays of electrical contacts. A constant current of 100 mA was applied to the plate, and the changes in the potential distribution resulting from impact damage documented. These results have been compared with those calculated using 3D finite element simulation of current flow in CFRP laminates. The results show good agreement between simulation and experimental results and will permit detailed analytical studies of optimum network and current input configurations for the practical realization of a damage sensing system. A comparison of potential distribution on the top surface for damaged and undamaged laminates shows a substantial difference in the potential field around the impact damaged area. This could form the basis of a damage detection system.

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“…Since CVS-induced VTH shift is mostly related with the bulk traps rather than the interface traps, nitrogen incorporation during the SiN CESL deposition can effectively passivate the oxygen vacancies within the dielectric [2], which will result in less electron trapping and small V TH shift during the CVS. Moreover, fluorine incorporation can also passivate the vacancies to form robust Hf-F bonds [6], which concludes that integrating the CFI process into the SiN CESL strained device can further suppress electron trapping and V TH shift. Compared with the control device, significantly improved CVS reliability is consequently obtained for the SiN CESL uniaxial strained nMOSFET with fluorinated HfO 2 /SiON gate stack using CFI process, primarily due to passivation of the oxygen vacancies.…”

Section: Advanced Materials Research Vols 383-390mentioning

confidence: 95%

“…Unfortunately, bias temperature instability is another serious reliability issue of the devices with HfO 2 dielectric due to the high defect densities [4]. Therefore, fluorine passivation technology has been successfully published to reduce the bulk and interfacial defects within the high-k gate stacks [5,6], which is useful to improve the gate leakage current, charge-to-breakdown and threshold voltage (V TH ) instability. However, the reliability characteristics of the fluorine passivation effect on the local strained n-channel metal-oxide-semiconductor field-effect-transistor (nMOSFET) are seldom investigated yet.…”

Section: Introductionmentioning

confidence: 99%

Characteristics of the SiN Uniaxial Strained NMOSFET with Channel Fluorine Implantation

Chen

Hsieh

Chiu

2011

AMR

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Channel fluorine implantation (CFI) has been successfully integrated with silicon nitride contact etch stop layer (SiN CESL) to further improve the channel hot electron stress (CHES) and constant voltage stress (CVS) reliability of n-channel metal-oxide-semiconductor field-effect-transistor with HfO2/SiON gate stack. Although the improvement of transconductance, drain current and subthreshold swing due to the fluorine passivation is screened out by the effect of uniaxial tensile strain, the result clearly demonstrates that integrating the CFI process in the SiN CESL-strained device can further suppress the CHES- and CVS-induced threshold voltage shift.

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Characteristics of the Fluorinated High-$k$ Inter-Poly Dielectrics

Cited by 7 publications

References 10 publications

Effects of Interfacial Fluorination on Performance Enhancement of High-k-Based Charge Trap Flash Memory

Effects of Interfacial Fluorination on Performance Enhancement of High-k-Based Charge Trap Flash Memory

Impact of Reducing Shallow Trench Isolation Mechanical Stress on Active Length for 40 nm n-Type Metal–Oxide–Semiconductor Field-Effect Transistors

Characteristics of the SiN Uniaxial Strained NMOSFET with Channel Fluorine Implantation

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