Characterization of fast charge trapping in bias temperature instability in metal-oxide-semiconductor field effect transistor with high dielectric constant Appl. Phys. Lett. 96, 142110 (2010); 10.1063/1.3384999 Enhancement mode GaAs metal-oxide-semiconductor field-effect-transistor integrated with thin AlN surface passivation layer and silicon/phosphorus coimplanted source/drain J.Effective surface passivation methodologies for high performance germanium metal oxide semiconductor field effect transistors Appl. Phys. Lett. 93, 192115 (2008); 10.1063/1.3028025Fabrication of gate stack with high gate work function for implantless enhancement-mode GaAs n -channel metal-oxide-semiconductor field effect transistor applicationsThe superior characteristics of the fluorinated HfO 2 / SiON gate dielectric are investigated comprehensively. Fluorine is incorporated into the gate dielectric through fluorinated silicate glass ͑FSG͒ passivation layer to form fluorinated HfO 2 / SiON dielectric. Fluorine incorporation has been proved to eliminate both bulk and interface trap densities due to Hf-F and Si-F bonds formation, which can strongly reduce trap generation as well as trap-assisted tunneling during subsequently constant voltage stress, and results in improved electrical characteristics and dielectric reliabilities. The results clearly indicate that the fluorinated HfO 2 / SiON gate dielectric using FSG passivation layer becomes a feasible technology for future ultrathin gate dielectric applications.
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