Chip-to-chip optical interconnections between stacked self-aligned SOI photonic chips

Bernabé, Stéphane; Kopp, Christophe; Volpert, Marion; Harduin, Julie; Fédéli, Jean-Marc; Ribot, H.

doi:10.1364/oe.20.007886

Cited by 37 publications

(23 citation statements)

References 8 publications

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“…In addition to Fiber-to-PIC coupling, grating-couplers can be used for optical proximity coupling or interlayer coupling [62][63][64], which allows for efficient vertical chip-to-chip and even board-to-chip connections (in conjunction with optical-PCBs mentioned above). Combined with low-loss waveguides for horizontal distribution, this vertical chip-to-chip optical connection allows for the possibility of true 3D integrated routing of light across optical-motherboards to multiple Si-PICs.…”

Section: Emerging Technologies For Photonics Packagingmentioning

confidence: 99%

Photonic Packaging: Transforming Silicon Photonic Integrated Circuits into Photonic Devices

et al. 2016

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Dedicated multi-project wafer (MPW) runs for photonic integrated circuits (PICs) from Si foundries mean that researchers and small-to-medium enterprises (SMEs) can now afford to design and fabricate Si photonic chips. While these bare Si-PICs are adequate for testing new device and circuit designs on a probe-station, they cannot be developed into prototype devices, or tested outside of the laboratory, without first packaging them into a durable module. Photonic packaging of PICs is significantly more challenging, and currently orders of magnitude more expensive, than electronic packaging, because it calls for robust micron-level alignment of optical components, precise real-time temperature control, and often a high degree of vertical and horizontal electrical integration. Photonic packaging is perhaps the most significant bottleneck in the development of commercially relevant integrated photonic devices. This article describes how the key optical, electrical, and thermal requirements of Si-PIC packaging can be met, and what further progress is needed before industrial scale-up can be achieved.

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Section: Emerging Technologies For Photonics Packagingmentioning

confidence: 99%

Photonic Packaging: Transforming Silicon Photonic Integrated Circuits into Photonic Devices

et al. 2016

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“…Also, from the packaging point of view, the use of a vertical coupling scheme imposes the fibers to be bent in order to limit the total thickness of the system. A third strategy consist into a hydrid between the two solutions described above [22], allowing at the same time a wafer level test strategy and a reduced package size after wafer dicing. For this, fiber attachment to the Silicon photonics chip is realized using silicon micro ferrule made of a wet etched V -groove holder which end is metallized with a gold coating.…”

Section: Coupling and Packagingmentioning

confidence: 99%

Silicon photonics research for CMOS compatible optical interconnects at 40Gb/s and beyond

Bœuf

Fulbert

Baudot

et al. 2012

2012 International Semiconductor Conference Dresden-Grenoble (ISCDG)

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Silicon photonics has generated an outstanding interest for optical communications in electronic systems. This papers reviews recent results of advanced high performance generic building blocks that can be used for a broad range of applications requiring up to 40Gb/s. Described building blocks are waveguides, laser sources by III-V/Si heterogeneous integration, fast silicon modulators and germanium photodetectors.I.

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“…Waveguide grating couplers have been of considerable interest over the years due to many and significant applications, such as in integrated optics, optical communications, optical sensors, and optical interconnects [1][2][3][4][5][6][7][8][9][10]. Waveguide grating couplers are divided into two major types: volume holographic couplers and surface-relief couplers depending on the modulation of their refractive index.…”

Section: Introductionmentioning

confidence: 99%

Preferential input-waveguide grating couplers: rigorous analysis using the pseudospectral time-domain method

Παπαδόπουλος

Glytsis

2012

Appl. Opt.

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Preferential input-waveguide grating couplers are rigorously analyzed using the pseudospectral time-domain method in the total field/scattered field formulation for TE and TM polarizations in conjunction with the convolutional perfect matching layer approach. Four kinds of preferential input-waveguide grating couplers are studied: the volume holographic grating coupler, the slanted parallelogrammic surface-relief grating coupler, the double-corrugated surface-relief grating coupler, and the reflecting-stack surface-relief grating coupler. Coupler's input coupling efficiencies to various waveguide modes are calculated. In addition, a comparative study of performance is presented in terms of the main design parameters and the operational free-space wavelength.

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Chip-to-chip optical interconnections between stacked self-aligned SOI photonic chips

Cited by 37 publications

References 8 publications

Photonic Packaging: Transforming Silicon Photonic Integrated Circuits into Photonic Devices

Photonic Packaging: Transforming Silicon Photonic Integrated Circuits into Photonic Devices

Silicon photonics research for CMOS compatible optical interconnects at 40Gb/s and beyond

Preferential input-waveguide grating couplers: rigorous analysis using the pseudospectral time-domain method

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