Classification of analog synthesis tools based on their architecture selection mechanisms

Martens, Ewout; Gielen, Georges

doi:10.1016/j.vlsi.2007.06.001

Cited by 44 publications

(16 citation statements)

References 96 publications

(134 reference statements)

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“…Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design [27]. 2 This formulation is valid for minimization problems. A simple change of sign applies for maximization.…”

Section: Generation Of Pareto-optimal Performance Frontsmentioning

confidence: 99%

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Context-dependent transformation of Pareto-optimal performance fronts of operational amplifiers

Roca

Velasco-Jimenez

Castro-López

et al. 2011

Analog Integr Circ Sig Process

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Abstract:The use of Pareto-optimal performance fronts in emerging design methodologies for analog integrated circuits is a keystone to overcome the limitations of traditional design methodologies. However, most techniques to generate the fronts reported so far neglect the effect that the surrounding circuitry (such as the load impedance) has on the Pareto-front, thereby making it only realistic for the context where the front was generated. This strongly limits the use of the Pareto front because of the strong dependence between the key performances of an analog circuit and its surrounding circuitry, but, more importantly, because this circuitry remains unknown until the Pareto-optimal front is being used. Since performance front generation is a costly process, this paper proposes that performance fronts for a new context of use of a given circuit can be obtained from fronts that were previously generated under some different conditions. Towards this goal, a transformation methodology for performance objectives of operational amplifiers has been developed. Experimental results for a folded-cascode and a Miller-compensated operational amplifiers show that this is a promising approach to reuse the fronts in multiple contexts.

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Section: Generation Of Pareto-optimal Performance Frontsmentioning

confidence: 99%

“…Key tasks in any analog design automation flow are topology selection and topology sizing [1], [2]. Given a set of design specifications, the first task refers to the selection of an appropriate topology, among a set of functionally equivalent ones, that can meet the specifications.…”

Section: Introductionmentioning

confidence: 99%

Context-dependent transformation of Pareto-optimal performance fronts of operational amplifiers

Roca

Velasco-Jimenez

Castro-López

et al. 2011

Analog Integr Circ Sig Process

View full text Add to dashboard Cite

show abstract

“…Their potentials in analog circuit design automation still need to be exploited. (2) The constraint handling problem is very important in analog circuit design, especially for high performance circuits, which are always highly constrained. Most reported synthesis methods use penalty functions to handle constraints, and few of them investigated solution algorithms for high performance design problems.…”

Section: Related Workmentioning

confidence: 99%

“…Different penalty coefficients were used in each of the 15 runs and the best result among them is shown in Table 12. 2 The comparison of computation times is shown in Table 13.…”

Section: Benchmark Problems For Constrained Optimizationmentioning

confidence: 99%

“…Consequently, automated synthesis methodologies for analog circuits have received much attention. The analog design procedure consists of topological-level design and parameter-level design (also called circuit sizing) [1,2]. This paper concentrates on the latter, aiming at parameter selection and optimization to improve the performances for a given circuit topology.…”

Section: Introductionmentioning

confidence: 99%

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