CMOS-integrated Sensor chip for in-plane and out-of-plane shear stress

Gieschke, P.; Oliver, Paul

doi:10.1016/j.proeng.2010.09.368

Cited by 13 publications

(6 citation statements)

References 5 publications

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“…The mean distributions of all four cure profiles show a maximum stress at the centre of the chip and reduced stress towards the edge. This corresponds roughly to the previously described model of a uniformly loaded beam, supported at its ends [21]. The range of stress values measured for all four profiles is presented in Fig.…”

Section: In-package Stress Measurementsupporting

confidence: 87%

“…This section of the article attempts to verify experimentally whether this is the case. Many versions of stress-measurement chips have been developed within the last decade in order to measure residual stresses during curing and subsequently optimise the heating process [15][16][17][18][19][20][21]. The chip used in this study was developed by Robert Bosch GmbH as part of the BMBF-funded project iForceSens [19].…”

Section: In-package Stress Measurementmentioning

confidence: 99%

“…where σk,l is one of the stress tensor components, π is the fourth order piezoresistive tensor and R is the resistance [21]. The piezoresistive tensors can be determined by a series of fourpoint bending tests on silicon strips at defined orientations and at various temperatures [19].…”

Section: In-package Stress Measurementmentioning

confidence: 99%

“…These accuracies apply as long as the stress component σzz normal to the chip surface is negligible (< 10 MPa) or is known and the temperature is measured correctly [20]. The measurement accuracy further depends on the integration time during measurement [21]. Different array configurations of this particular stress chip are available [22].…”

Section: In-package Stress Measurementmentioning

confidence: 99%

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Reliability Testing and Stress Measurement of QFN Packages Encapsulated by an Open-Ended Microwave Curing System

Adamietz

Desmulliez

Pavuluri

et al. 2019

IEEE Trans. Compon., Packag. Manufact. Technol.

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Abstract-In this paper, the influence of microwave curing on the reliability of a representative electronic package is examined by reliability testing and measurement of residual stresses. A LM358 voltage regulator die was mounted to an open Quad Flat No-leads package (QFN) for reliability testing. For the stress measurement, a specifically designed stress measurement die was mounted to the QFN package. The chips were encapsulated with_Hysol EO1080 thermosetting polymer material. Curing was performed using an open-ended microwave oven system equipped with in situ temperature control. Three different temperature profiles for microwave curing were selected according to the requested degree of cure and chemical composition of the cured material. A convection cure profile was selected for the control group samples. Thermal cycling and HAST tests were performed on a total number of 80 chips. 95 QFN packages with stress measurement chips were also manufactured. Increased lifetime expectancy of the microwave cured packaged chips was experimentally demonstrated and measured between 62% to 149% increased lifetime expectancy after Temperature Cycling Test (TCT), and between 63% and 331% after highly Accelerated Ageing Test (HAST) and TCT compared to conventionally cured packages. Analysis of specifically designed stress test chips showed significantly lower residual stresses ranging from 26 MPa to 58.3 MPa within the microwave cured packages compared to conventionally cured packaged chips which displayed residual stresses ranging from 54 MPa to 80.5 MPa. This article therefore provides additional confidence in the industrial relevance of the microwave curing system and its advantages compared to traditional convection oven systems.

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Section: In-package Stress Measurementsupporting

confidence: 87%

Section: In-package Stress Measurementmentioning

confidence: 99%

Section: In-package Stress Measurementmentioning

confidence: 99%

Section: In-package Stress Measurementmentioning

confidence: 99%

See 2 more Smart Citations

Reliability Testing and Stress Measurement of QFN Packages Encapsulated by an Open-Ended Microwave Curing System

Adamietz

Desmulliez

Pavuluri

et al. 2019

IEEE Trans. Compon., Packag. Manufact. Technol.

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show abstract

“…Starting with pioneering work at Infineon [1,2] several European research institutes now offer CMOS stress measurement facilities, e.g. university of Magdeburg [3,4], ETH Zurich [5], IMTEK at university of Freiburg [6] and Fraunhofer IZM [8].…”

Section: Stress Measurement Systemmentioning

confidence: 99%

Stress analysis during assembly and packaging

Schreier-Alt

Unterhofer²,

Ansorge

et al. 2011

2011 IEEE 61st Electronic Components and Technology Conference (ECTC)

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This paper investigates stress and strain within electronic systems during fabrication and reliability testing. The paper presents results of a new on-chip CMOS stress measurement technology. We investigated stresses during microelectronic packaging and reliability testing. Special focus is on transfer molding, stress during temperature change and during reliability tests. Experimental results are compared with numerical simulations. The stress sensor is based on a CMOS chip, subdivided into 60 measurement cells (300m grid) and needs only four electrical connections. We are able to measure the shear and both main stresses in-plane of the chip surface. The stress value of the measurement cell can be interrogated subsequently within 16 ms time steps. The main potential of this stress measurement chip is to replace selected electronic parts and to investigate all production and lifetime related loads acting on the system. The presented measurement technique enables a more accurate characterization of manufacturing processes and polymers' behavior. Finally the sensor enables the choice of optimized materials minimizing production related stresses and leading to more reliable products

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Silicon solar cell–integrated stress and temperature sensors for photovoltaic modules

Beinert

Imm

Benick

et al. 2020

Progress in Photovoltaics

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We propose silicon solar cell–integrated stress and temperature sensors as a new approach for the stress and temperature measurement in photovoltaic (PV) modules. The solar cell–integrated sensors enable a direct and continuous in situ measurement of mechanical stress and temperature of solar cells within PV modules. In this work, we present a proof of concept for stress and temperature sensors on a silicon solar cell wafer. Both sensors were tested in a conventional PV module setup. For the stress sensor, a sensitivity of (−47.41 ± 0.14)%/GPa has been reached, and for the temperature sensor, a sensitivity of (3.557 ± 0.008) × 10−3 K−1 has been reached. These sensors can already be used in research for increased measurement accuracy of the temperature and the mechanical stress in PV modules because of the implementation at the precise location of the solar cells within a laminate stack, for process evaluation, in‐situ measurements in reliability tests, and the correlation with real exposure to climates.

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CMOS-integrated Sensor chip for in-plane and out-of-plane shear stress

Cited by 13 publications

References 5 publications

Reliability Testing and Stress Measurement of QFN Packages Encapsulated by an Open-Ended Microwave Curing System

Reliability Testing and Stress Measurement of QFN Packages Encapsulated by an Open-Ended Microwave Curing System

Stress analysis during assembly and packaging

Silicon solar cell–integrated stress and temperature sensors for photovoltaic modules

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