CoLPUF : A Novel Configurable LFSR-based PUF

Srinivasu, B.; Vikramkumar, P.; Chattopadhyay, Anupam; Lam, Kwok-Yan

doi:10.1109/apccas.2018.8605643

Cited by 15 publications

(9 citation statements)

References 12 publications

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“…The PUF [17] used in KMU (Table 3) was configured to accept 16 bit challenge strings to generate 128 bit raw responses. The key extraction uses BCH(15,7,2) encoder/decoder modules.…”

Section: Discussionmentioning

confidence: 99%

“…A Secure Boot Protocol ensuring first-instructionintegrity, supporting both both classical [15] and post-quantum public-key [16] signature schemes 2. A Key Management Framework around a PUF [17] 3. Memory Protection Unit to ensure confidentiality and integrity properties [18] 4.…”

Section: Contributionsmentioning

confidence: 99%

“…1. ITUS uses the configurable response-length LFSR-based PUF, reported in [17], with a lightweight and reliable key extraction through sequential use of BCH error correcting code BCH(15, 7, 2) operating on 7 bit segments at a time. The component PUF, shown in Fig.…”

Section: Memory Protection Unitmentioning

confidence: 99%

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Towards Designing a Secure RISC-V System-on-Chip: ITUS

et al. 2020

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A rising tide of exploits, in the recent years, following a steady discovery of the many vulnerabilities pervasive in modern computing systems has led to a growing number of studies in designing systems-on-chip (SoCs) with security as a first-class consideration. Following the momentum behind RISC-V based systems in the public domain, much of this effort targets RISC-V based SoCs; most ideas, however, are independent of this choice. In this manuscript we present a consolidation of our early efforts along these lines in designing a secure SoC around RISC-V, named ITUS. In particular, we discuss a set of primitive building blocks of a secure SoC and present some of the implemented security subsystems using these building blocks-such as secure boot, memory protection, PUF-based key management, a countermeasure methodology for RISC-V micro-architectural side-channel leakage, and an integration of the open keystone-enclaves for TEE. The current ITUS SoC prototype, integrating the discussed security subsystems, was built on top of the lowRISC project, however, these are portable to any other SoCThe authors acknowledge the support from the Singapore National Research Foundation ("SOCure" grant NRF2018NCR-NCR002-0001 -www.green-ic.org/socure) and BICSAF grant.

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“…The PUF [17] used in KMU (Table 3) was configured to accept 16 bit challenge strings to generate 128 bit raw responses. The key extraction uses BCH(15,7,2) encoder/decoder modules.…”

Section: Discussionmentioning

confidence: 99%

Section: Contributionsmentioning

confidence: 99%

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Towards Designing a Secure RISC-V System-on-Chip: ITUS

et al. 2020

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“…The authors of [ 149 ] proposed a new authentication scheme for IoT system based on PUF. The scheme is based on generating a response of a challenge, then feeding the response to another PUF as a challenge.…”

Section: Analysis Of Iot Authentication Schemesmentioning

confidence: 99%

A Survey of Internet of Things (IoT) Authentication Schemes

El-Hajj

Fadlallah

Chamoun

et al. 2019

Sensors

329

151

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The Internet of Things (IoT) is the ability to provide everyday devices with a way of identification and another way for communication with each other. The spectrum of IoT application domains is very large including smart homes, smart cities, wearables, e-health, etc. Consequently, tens and even hundreds of billions of devices will be connected. Such devices will have smart capabilities to collect, analyze and even make decisions without any human interaction. Security is a supreme requirement in such circumstances, and in particular authentication is of high interest given the damage that could happen from a malicious unauthenticated device in an IoT system. This paper gives a near complete and up-to-date view of the IoT authentication field. It provides a summary of a large range of authentication protocols proposed in the literature. Using a multi-criteria classification previously introduced in our work, it compares and evaluates the proposed authentication protocols, showing their strengths and weaknesses, which constitutes a fundamental first step for researchers and developers addressing this domain.

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“…Therefore, these experimental results demonstrate a good overall reproducibility of CF-ROPUF sample frequencies under varying temperatures and supply voltages. The reliability of our configurable PUF with different types of silicon PUFs that are suitable for FPGA [16], [55], [56] are compared in Table 4. Our CF-ROPUF shows a slightly better average reliability as compared to the other designs.…”

Section: ) Puf Reproducibilitymentioning

confidence: 99%

Enhancing the Performance of Lightweight Configurable PUF for Robust IoT Hardware-Assisted Security

et al. 2021

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Lightweight physical unclonable functions (LPUFs) exploit manufacturing process variations of semiconductor integrated circuits (ICs) to protect IoT-based electronic and smart devices from new cyberattacks. This paper proposes two novel security techniques to enhance the robustness of LPUFs using configurable-based ring oscillator PUFs (CF-ROPUFs). These techniques are the intar-die frequency aware (IFA) approach to improve PUF reliability and the logarithmic gamma function (Ln) technique to enhance PUF randomness. The lightweight CF-ROPUF design is realized on hardware, and data samples are collected under varying temperatures and supply voltages over a population of 30 Spartan-3E FP-GAs.Experimental results of the IFA technique in terms of average Hamming Weight (HM) demonstrate that the percentage of the reliable RO sample frequencies PUF output is 98.5%. For the analysis, PUF reliability is evaluated in terms of accuracy, repeatability, and reproducibility, which are the international organization for Standardization (ISO) standards. The results indicate that the RO samples are accurately measured from the CF-ROPUFs mapped in all the chips. After using the proposed 1-out-of-r coding algorithm, the results demonstrate high average repeatability of 98.2% and a magnified average reproducibility of 99.63%. It is also shown that our CF-ROPUF design is immune from accelerated aging impacts reliability issues. Statistical results show thatLnenhances the normality and mitigates the negative impacts of the systematic process variations on RO sample frequencies. Randomness results show that CF-ROPUF binary response bits can successfully pass the 15 NIST test suites for true randomness with an enhanced percentage, 93.3%, with the application of the 1-out-of-r coding INDEX TERMS Lightweight hardware security, configurable ROPUF, PUF reliability, PUF aging, ISO standards.

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CoLPUF : A Novel Configurable LFSR-based PUF

Cited by 15 publications

References 12 publications

Towards Designing a Secure RISC-V System-on-Chip: ITUS

Towards Designing a Secure RISC-V System-on-Chip: ITUS

A Survey of Internet of Things (IoT) Authentication Schemes

Enhancing the Performance of Lightweight Configurable PUF for Robust IoT Hardware-Assisted Security

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