Comparison of Measurement Techniques for Linewidth Metrology on Advanced Photomasks

Smith, S.; Tsiamis, Andreas; McCallum, Martin; Hourd, Andrew C.; Stevenson, J.T.M.; Walton, A.J.; Dixson, Ronald G.; Allen, Richard A.; Potzick, James E.; Cresswell, Michael W.; Orji, Ndubuisi G.

doi:10.1109/tsm.2008.2010733

Cited by 8 publications

(5 citation statements)

References 19 publications

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“…; HAADF-STEM and atom probe tomography 143 ; OCD, X-ray fluorescence (XRF) and electrical characterisation 144 . ; and electrical, AFM, and optical 145 .…”

Section: Hybrid or Combined Metrologymentioning

confidence: 99%

“…A key issue that will increasingly affect all aspects of IC device measurements is traceability 145, 146 . Given that properties and functionality at the nanoscale are governed by absolute size, traceability of nanoscale dimensional measurements is crucial to the success of nanomanufacturing, and indispensable for valid comparisons of the results of various measurement techniques.…”

Section: Hybrid or Combined Metrologymentioning

confidence: 99%

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Metrology for the next generation of semiconductor devices

Badaroglu²,

et al. 2018

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The semiconductor industry continues to produce ever smaller devices that are ever more complex in shape and contain ever more types of materials. The ultimate sizes and functionality of these new devices will be affected by fundamental and engineering limits such as heat dissipation, carrier mobility and fault tolerance thresholds. At present, it is unclear which are the best measurement methods needed to evaluate the nanometre-scale features of such devices and how the fundamental limits will affect the required metrology. Here, we review state-of-the-art dimensional metrology methods for integrated circuits, considering the advantages, limitations and potential improvements of the various approaches. We describe how integrated circuit device design and industry requirements will affect lithography options and consequently metrology requirements. We also discuss potentially powerful emerging technologies and highlight measurement problems that at present have no obvious solution.

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“…; HAADF-STEM and atom probe tomography 143 ; OCD, X-ray fluorescence (XRF) and electrical characterisation 144 . ; and electrical, AFM, and optical 145 .…”

Section: Hybrid or Combined Metrologymentioning

confidence: 99%

Section: Hybrid or Combined Metrologymentioning

confidence: 99%

Metrology for the next generation of semiconductor devices

Badaroglu²,

et al. 2018

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“…by taking the reference points on the opposite edges of any line pair. The linewidth measurand is very sensitive to the sensing mechanism; therefore, a same linewidth standard may result in different calibrated values depending on the sensing technology used [267] (see also Sect. 2 and Figure 5).…”

Section: Linewidth Standardsmentioning

confidence: 99%

Dimensional artefacts to achieve metrological traceability in advanced manufacturing

et al. 2020

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“…The critical importance of GLC resulted in creation of a great variety of conceptually, statistically, and algorithmically different techniques, including: (i) direct measurements methods [11], (ii) field-programmable gate array (FPGA) reconfiguration-based approaches [12][13], (iii) schemes that embed and observe dedicated IC structures and specialized circuity [14], and (iv) non-destructive universal techniques that employ global measurements and calculate scaling factors of each gate by solving a system of equations [15] [16][17] [18].…”

Section: A Gate-level Characterization (Glc)mentioning

confidence: 99%

Gate Characterization Using Singular Value Decomposition: Foundations and Applications

Wei

Nahapetian

Nelson

et al. 2012

IEEE Trans.Inform.Forensic Secur.

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Abstract-Modern hardware security has a very broad scope ranging from digital rights management to the detection of ghost circuitry. These and many other security tasks are greatly hindered by process variation, which makes each integrated circuit (IC) unique, and device aging, which evolves the IC throughout its lifetime. We have developed a singular value decomposition (SVD)-based procedure for gate-level characterization (GLC) that calculates changes in properties, such as delay and switching power of each gate of an IC, accounting for process variation and device aging.We employ our SVD-based GLC approach for the development of two security applications: hardware metering and ghost circuitry (GC) detection. We present the first robust and low-cost hardware metering scheme, using an overlapping IC partitioning approach that enables rapid and scalable treatment. We also map the GC detection problem into an equivalent task of GLC consistency checking using the same overlapping partitioning. The effectiveness of the approaches is evaluated using the ISCAS85, ISCAS89, and ITC99 benchmarks. In hardware metering, we are able to obtain probabilities of coincidence in the magnitude of 10 −8 or less, and we obtain zero false positives and zero false negatives in GC detection.

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Comparison of Measurement Techniques for Linewidth Metrology on Advanced Photomasks

Cited by 8 publications

References 19 publications

Metrology for the next generation of semiconductor devices

Metrology for the next generation of semiconductor devices

Dimensional artefacts to achieve metrological traceability in advanced manufacturing

Gate Characterization Using Singular Value Decomposition: Foundations and Applications

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