Composite aluminum silicon-single electron transistor with tunnel FET features

Lee, Yen-Chun; Orlov, Alexei O.; Snider, Gregory L.

doi:10.1109/nano.2012.6322143

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2014

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“…The process can be used in the pursuit of high temperature single electron and other nanoelectronic devices. It has in fact been successfully adapted to make silicon planar TFET [15] and a similar process has also enabled the fabrication of single electron transistors using Al 2 O 3 [16].…”

Section: Discussionmentioning

confidence: 99%

Damascene planar metal-insulator-metal tunnel junctions

Droulers

Ecoffey

Guilmain

et al. 2014

14th IEEE International Conference on Nanotechnology

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In this paper, we show a process for the fabrication of planar sub-attofarad capacitance metal-insulator-metal tunnel junctions with nanometer size. We show the engineering of the material stack, anti-diffusion barrier and electrode metal as well as the result of improved characteristics and stability in time of the devices. This engineering is supported by a simulation tool we developed and its goal is to optimize the original process for the development of high-temperature operating SETs and other innovative nanoelectronic devices.

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Section: Discussionmentioning

confidence: 99%