Continuous Analytic I–V Model for Surrounding-Gate MOSFETs

Jiménez, David; Iñı́guez, Benjamı́n; Suñé, J.; Marsal, Lluís F.; Pallarès, Josep; Roig, J.; Flores, D.

doi:10.1109/led.2004.831902

Cited by 271 publications

(206 citation statements)

References 5 publications

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“…The first one is the double integration solving (Jimenez & al., 2004;Yu & al., 2007); however the solution is not totally analytical which is not convenient in our case. The second approach is to make an assumption on the potential description along the nanowire radius.…”

Section: Definition Of the Threshold Voltagementioning

confidence: 99%

Nanowires: Promising Candidates for Electrostatic Control in Future Nanoelectronic Devices

Dura¹,

Martinie²,

Munteanu³

et al. 2012

Electrostatics

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Section: Definition Of the Threshold Voltagementioning

confidence: 99%

Nanowires: Promising Candidates for Electrostatic Control in Future Nanoelectronic Devices

Dura¹,

Martinie²,

Munteanu³

et al. 2012

Electrostatics

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“…Analytical models are based on two assumptions, 1) an undoped semiconductor nanowire and 2) Boltzmann statistics [2][3][4][5][6]. These assumptions allow, in fact, for a closed form solution of Poisson's Eqs.…”

Section: Introductionmentioning

confidence: 99%

“…These assumptions allow, in fact, for a closed form solution of Poisson's Eqs. [2,3], that makes it possible to work out an intrinsic analytical relationship between the gate voltage and surface potential. Alternatively, the assumption is taken of a completely depleted nanowire, consistently with the investigation of Sub threshold Slope (SS) and short channel effects [7].…”

Section: Introductionmentioning

confidence: 99%

Analytical Threshold Voltage Modeling of Surrounding Gate Silicon Nanowire Transistors with Different Geometries

Pandian¹,

Balamurugan²

2014

Journal of Electrical Engineering and Technology

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-In this paper, we propose new physically based threshold voltage models for short channel Surrounding Gate Silicon Nanowire Transistor with two different geometries. The model explores the impact of various device parameters like silicon film thickness, film height, film width, gate oxide thickness, and drain bias on the threshold voltage behavior of a cylindrical surrounding gate and rectangular surrounding gate nanowire MOSFET. Threshold voltage roll-off and DIBL characteristics of these devices are also studied. Proposed models are clearly validated by comparing the simulations with the TCAD simulation for a wide range of device geometries.

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“…Surrounding gate (SG) MOSFETs have been proposed to extend the scaling limit of conventional MOSFETs to 10nm gate length and beyond, owing their excellent control of the short-channel effects and high current driving ability [1][2][3][4][5]. Several classical models have been developed for SG MOSFETs.…”

Section: Introductionmentioning

confidence: 99%

A Compact Quantum Model for Cylindrical Surrounding Gate MOSFETs using High-k Dielectrics

Vimala¹,

Balamurugan²

2014

Journal of Electrical Engineering and Technology

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-In this paper, an analytical model for Surrounding Gate (SG) metal-oxide-semiconductor field effect transistors (MOSFETs) considering quantum effects is presented. To achieve this goal, we have used variational approach for solving the Poission and Schrodinger equations. This model is developed to provide an analytical expression for inversion charge distribution function for all regions of device operation. This expression is used to calculate the other important parameters like inversion charge density, threshold voltage, drain current and gate capacitance. The calculated expressions for the above parameters are simple and accurate. This paper also focuses on the gate tunneling issue associated with high dielectric constant. The validity of this model was checked for the devices with different dimensions and bias voltages. The calculated results are compared with the simulation results and they show good agreement.

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Continuous Analytic I–V Model for Surrounding-Gate MOSFETs

Cited by 271 publications

References 5 publications

Nanowires: Promising Candidates for Electrostatic Control in Future Nanoelectronic Devices

Nanowires: Promising Candidates for Electrostatic Control in Future Nanoelectronic Devices

Analytical Threshold Voltage Modeling of Surrounding Gate Silicon Nanowire Transistors with Different Geometries

A Compact Quantum Model for Cylindrical Surrounding Gate MOSFETs using High-k Dielectrics

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