Herein, we have demonstrated the control over the structure of precatalysts to tune the properties of the active catalysts and their water oxidation activity. The reaction of K 3 [Fe(CN) 6 ] and Na 2 [Fe(CN) 5 (NO)] with Co(OH) 2 @CC produced precatalysts PC-1 and PC-2, respectively, with distinct structural and electronic features. The replacement of the À CN group with strong π-acceptor À NO modulates the electronic and atomic structure of PC-2. As a result, a facile electrochemical transformation of PC-2 into active catalyst FeÀ Co-(OH) 2 -Co(O)OH (AC-2) has been attained only in 15 CV cycles while 600 CV cycles are required for the electrochemical activation of PC-1 into AC-1. The X-ray absorption studies reveal the contraction of the CoÀ O and FeÀ O bond in AC-2 because of the presence of a higher amount of Co 3 + and Fe 3 + than in AC-1. The high valent Co 3 + and Fe 3 + modulates the electronic properties of AC-2 and assists in the OÀ O bond formation, leading to the improved water oxidation activity.

-In this paper, we propose new physically based threshold voltage models for short channel Surrounding Gate Silicon Nanowire Transistor with two different geometries. The model explores the impact of various device parameters like silicon film thickness, film height, film width, gate oxide thickness, and drain bias on the threshold voltage behavior of a cylindrical surrounding gate and rectangular surrounding gate nanowire MOSFET. Threshold voltage roll-off and DIBL characteristics of these devices are also studied. Proposed models are clearly validated by comparing the simulations with the TCAD simulation for a wide range of device geometries.

Surrounding gate architecture for transistors has been shown to alleviate many of the problems posted by scaling and short channel effects. Semiconducting nanowires have recently attracted considerable attention in the semiconductor industry. With their unique electrical and optical properties, they offer interesting perspectives for basic research as well as for technology. In this paper, we have proposed a new analytical model for three different geometries of Surrounding Gate Silicon Nanowire Transistors. I–V characteristics (current-voltage) of the devices are effectively derived in all the three regions of operation. The variation of threshold voltage and drain current due to the device parameters like silicon thickness, doping concentration and radius are also predicted. Effectiveness of the models are fully validated by comparing the analytical results with the TCAD simulation results.

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