Proceedings of the Eighth International Conference on Architectural Support for Programming Languages and Operating Systems 1998
DOI: 10.1145/291069.291020
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Data speculation support for a chip multiprocessor

Abstract: Thread-level speculation is a technique that enables parallel execution of sequential applications on a multiprocessor. This paper describes the complete implementation of the support for threadlevel speculation on the Hydra chip multiprocessor (CMP). The support consists of a number of software speculation control handlers and modifications to the shared secondary cache memory system of the CMP. This support is evaluated using five representative integer applications. Our results show that the speculative sup… Show more

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Cited by 276 publications
(157 citation statements)
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“…Much prior work has investigated thread-level speculation (TLS) schemes to parallelize sequential programs [25,28,60,61,66,69]. TLS schemes ship tasks from function calls or loop iterations to different cores, run them speculatively, and commit them in program order.…”
Section: Background On Hw Support For Speculative Parallelismmentioning
confidence: 99%
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“…Much prior work has investigated thread-level speculation (TLS) schemes to parallelize sequential programs [25,28,60,61,66,69]. TLS schemes ship tasks from function calls or loop iterations to different cores, run them speculatively, and commit them in program order.…”
Section: Background On Hw Support For Speculative Parallelismmentioning
confidence: 99%
“…However, it creates complex chains of dependences among speculative tasks. Thus, upon detecting mispeculation, most TLS schemes abort the task that caused the violation and all later speculative tasks [25,28,61,66,68]. TCC [29] and Bulk [11] are the exception: they do not forward data and only abort later readers when the earlier writer commits.…”
Section: Background On Hw Support For Speculative Parallelismmentioning
confidence: 99%
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