Deep-submicrometer channel design in silicon-on-insulator (SOI) MOSFET's

Abstract

Short-channel effects in deep-submicrometer SO1 short-channel effect (SCE) and drain-induced barrier lowering MOSFET'S are explored over a wide range of device param-(DIBL') in s o 1 as a function of device DameterS. The eters using two-dimensional numerical simulations. To obtain reduced short-channel effects in SO1 over bulk technologies, the silicon film thickness must be considerably smaller than the bulk junction deDth because of an additional charpe-sharinp ;imulaied is an s o 1 MOSFET with uiifom doping in the channel and source/drain regions. Two different technology generations are simulated. The electrical effective channel phenomenon through the SO1 buried oxide. The opt&al desi& space, considering nominal and short-channel threshold voltage, lengths, L , f f , of the simulated devices are 0.2 pm and 0.1 ilm with gate oxide thicknesses of 7 and 5 nm and maximum shows ample desi@ options for both fully and partially depleted devices, however, manufacturing considerations in the 0.1 pm regime mav favor oartiallv deoleted devices.

Analysis of dependence of short-channel effects in double-gate MOSFETs on channel thickness

“…With a further reduction in Tch to below 16 nm, DIBL and subthreshold swing decreased rapidly and exhibited values smaller than those of the planar MOSFET. These results indicate that the electric field from the drain penetrates the channel in double-gate MOSFETs with an inappropriate Tch, even although there is no BOX layer, unlike SOI MOSFETs [10].…”

“…The relationship between Tch and SCEs has been evaluated in single-gate planar SOI MOSFETs, and the mechanism for the dependence of the short-channel performance degradation on Tch has been discussed [10]. In the case of SOI MOSFETs, penetration of the electric field from the drain into the channel through the underlying buried oxide (BOX) layer was found to be a major cause for the degradation.…”

Deep sub-0.1-�m MOSFETs with very thin SOI layer for ultralow-power applications

“…In the 0.1 mm generation, bulk MOSFET suppresses the short channel effect more effectively than FD SOI MOSFET [2], whereas in the 0.03 mm generation bulk MOSFET exhibits a more severe short channel effect than FD SOI MOSFET and has an inferior subthreshold swing. As described later, this is due to suppression of the short channel effect in FD SOI MOSFET via reduction of the channel depletion layer width l D by t SOI even if N A is nondoped.…”

Controlling Short-Channel Effects in Deep-Submicron SOI MOSFETs for Improved Reliability: A Review

“…Fig. 7 shows the threshold voltage shift versus the thin-film thickness of an SOI NMOS device with a front gate oxide of 5 nm and a buried oxide of 360 nm for various channel doping densities, biased at (a) V DS = 0.05 V, and (b) 1.5 V [36]. As shown in Fig.…”