Demonstration of a Reliable 1 Gb Standalone Spin-Transfer Torque MRAM For Industrial Applications

Aggarwal, S.; Nagel, K.; Shimon, G.; Sun, J. J.; Andre, T.; Alam, Syed Q.; Almasi, Hamid; DeHerrera, M.; Hughes, Brian; Ikegawa, S.; Janesky, J.; Lee, H. K.; Lu, Hao; Mancoff, F. B.

doi:10.1109/iedm19573.2019.8993516

Cited by 75 publications

(24 citation statements)

References 4 publications

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“…Process variations in MTJ's geometrical parameters (e.g., CD, t FL , t TB ) and magnetic properties (e.g., H k and M s ) greatly contribute to the device-to-device variation in the switching behavior on top of the intrinsic switching stochasticity, as shown with silicon data in [35,36]. Our MTJ model takes into account process variation by introducing a Gaussian distribution to each of the above parameters.…”

Section: Process Variation (Pv)mentioning

confidence: 99%

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Characterization, Modeling, and Test of Intermediate State Defects in STT-MRAM

Wu¹,

Rao²,

Taouil³

et al. 2021

Preprint

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<div>The manufacturing process of STT-MRAM requires unique steps to fabricate and integrate magnetic tunnel junction (MTJ) devices which are data-storing elements. Thus, understanding the defects in MTJs and their faulty behaviors are paramount for developing high-quality test solutions. This article applies the advanced device-aware test to intermediate (IM) state defects in MTJ devices based on silicon measurements and circuit simulations. An IM state manifests itself as an abnormal third resistive state, which differs from the two bi-stable states of MTJ. We performed silicon measurements on MTJ devices with diameter ranging from 60nm to 120nm; the results show that the occurrence probability of IM state strongly depends on the switching direction, device size, and bias voltage. We demonstrate that the conventional resistor- based fault modeling and test approach fails to appropriately model and test such a defect. Therefore, device-aware test is applied. We first physically model the defect and incorporate it into a Verilog-A MTJ compact model and calibrate it with silicon data. Thereafter, this model is used for a systematic fault analysis based on circuit simulations to obtain accurate and realistic faults in a pre-defined fault space. Our simulation results show that an IM state defect leads to intermittent write transition faults. Finally, we propose and implement a device-aware test solution to detect the IM state defect.</div>

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Section: Process Variation (Pv)mentioning

confidence: 99%

“…The operating temperature also has a large impact on the switching behavior in STT-MRAM as demonstrated in [36,37]. In our simulations, we took into account temperature variation by assigning a uniform distribution to the operating temperature from −40 • C to 125 • C (typical industrial standard).…”

Section: Temperature Variation (Tv)mentioning

confidence: 99%

Characterization, Modeling, and Test of Intermediate State Defects in STT-MRAM

Wu¹,

Rao²,

Taouil³

et al. 2021

Preprint

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“…STT-MRAM can be integrated in a broad range of applications, from Internet-of-Things to automotive applications [ 3 ] and last level caches [ 8 , 9 , 10 ]. Recently, 1Gb standalone [ 11 ] and embedded STT-MRAM solutions [ 2 , 4 , 12 , 13 ] have been reported and STT-MRAM operation with a timing of a few nanoseconds has been demonstrated [ 8 ]. However, in order to further reduce the timing below the nanosecond range, the required current density becomes quite large.…”

Section: Introductionmentioning

confidence: 99%

Optimization of a Spin-Orbit Torque Switching Scheme Based on Micromagnetic Simulations and Reinforcement Learning

et al. 2021

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Spin-orbit torque memory is a suitable candidate for next generation nonvolatile magnetoresistive random access memory. It combines high-speed operation with excellent endurance, being particularly promising for application in caches. In this work, a two-current pulse magnetic field-free spin-orbit torque switching scheme is combined with reinforcement learning in order to determine current pulse parameters leading to the fastest magnetization switching for the scheme. Based on micromagnetic simulations, it is shown that the switching probability strongly depends on the configuration of the current pulses for cell operation with sub-nanosecond timing. We demonstrate that the implemented reinforcement learning setup is able to determine an optimal pulse configuration to achieve a switching time in the order of 150 ps, which is 50% shorter than the time obtained with non-optimized pulse parameters. Reinforcement learning is a promising tool to automate and further optimize the switching characteristics of the two-pulse scheme. An analysis of the impact of material parameter variations has shown that deterministic switching can be ensured for all cells within the variation space, provided that the current densities of the applied pulses are properly adjusted.

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“…On the other hand, in addition to the electrical detection of magnetization, the experimental realization of current-driven magnetization switching by spin-transfer torque (STT) in a magnetic tunnel junction (MTJ, i.e., an FM/barrier/FM structure, such as CoFeB/MgO/CoFeB, the resistance that depends on the relative magnetic orientation of the two FMs) has fueled intensive interests in spintronic community since 1996 ( Berger, 2008 ; Slonczewski, 1996 ; Brataas et al., 2012 ). Taking the merits of TMR reading and STT writing of the perpendicular magnetic anisotropy (PMA) FM free layer in an MTJ, the scalable commercial perpendicular MTJ-based STT-magnetic random access memory (MRAM) was successfully produced by Everspin Technologies in August 2016 ( Slaughter et al., 2016 ) and pilot production was further started on 28-nm 1-Gb STT-MRAM chips in June 2019 ( Aggarwal et al., 2019 ). The STT configuration is schematically shown in Figure 1 A, where a spin-polarized electrons flux is generated owing to the interaction of electron spins and the magnetization when the current passes through (or is reflected by) the FM reference layer, and thereby transfers spin angular momentum to the local magnetization M of the FM free layer via tunneling barrier layer.…”

Section: Introductionmentioning

confidence: 99%

Prospect of Spin-Orbitronic Devices and Their Applications

et al. 2020

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Summary Science, engineering, and medicine ultimately demand fast information processing with ultra-low power consumption. The recently developed spin-orbit torque (SOT)-induced magnetization switching paradigm has been fueling opportunities for spin-orbitronic devices, i.e., enabling SOT memory and logic devices at sub-nano second and sub-picojoule regimes. Importantly, spin-orbitronic devices are intrinsic of nonvolatility, anti-radiation, unlimited endurance, excellent stability, and CMOS compatibility, toward emerging applications, e.g., processing in-memory, neuromorphic computing, probabilistic computing, and 3D magnetic random access memory. Nevertheless, the cutting-edge SOT-based devices and application remain at a premature stage owing to the lack of scalable methodology on the field-free SOT switching. Moreover, spin-orbitronics poises as an interdisciplinary field to be driven by goals of both fundamental discoveries and application innovations, to open fascinating new paths for basic research and new line of technologies. In this perspective, the specific challenges and opportunities are summarized to exert momentum on both research and eventual applications of spin-orbitronic devices.

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Demonstration of a Reliable 1 Gb Standalone Spin-Transfer Torque MRAM For Industrial Applications

Cited by 75 publications

References 4 publications

Characterization, Modeling, and Test of Intermediate State Defects in STT-MRAM

Characterization, Modeling, and Test of Intermediate State Defects in STT-MRAM

Optimization of a Spin-Orbit Torque Switching Scheme Based on Micromagnetic Simulations and Reinforcement Learning

Prospect of Spin-Orbitronic Devices and Their Applications

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