2016 74th Annual Device Research Conference (DRC) 2016
DOI: 10.1109/drc.2016.7548399
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Density scaling beyond the FinFET: Architecture considerations for gate-all-around CMOS

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“…However, the scaling of fin in ultra-scale dimensions leads to flow in gate leakage current and degraded behaviour. This leakage current can be overcome by using a gate at the bottom of fin [5]. In this regard, the effective channel width can be increased with reduced leakage current through multiple ribbons in FET and such structure is called as nano ribbon FET (NRFET).…”
Section: Introductionmentioning
confidence: 99%
“…However, the scaling of fin in ultra-scale dimensions leads to flow in gate leakage current and degraded behaviour. This leakage current can be overcome by using a gate at the bottom of fin [5]. In this regard, the effective channel width can be increased with reduced leakage current through multiple ribbons in FET and such structure is called as nano ribbon FET (NRFET).…”
Section: Introductionmentioning
confidence: 99%