Design and characterization of a post-processed copper heat sink for smart power drivers [lateral nDMOS drivers]

bosch, G. Van den; Webers, Tomas; Driessens, Evelien; Elattari, B.; Wojciechowski, D.; Gassot, P.; Moens, P.; Groeseneken, G.

doi:10.1109/icmts.2005.1452210

Cited by 2 publications

(1 citation statement)

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“…Zawischka et al [2] modifies the chip layout by reduced source contact density or separated gates. Another way is to lower the temperature rise within the active transistor by incorporation of a thick Cu layer on top of the power device [3].…”

Section: Introductionmentioning

confidence: 99%

Optimization of energy capability in power semiconductor devices

Chen

Deckers

Sander

2014

Proceedings of the 5th Electronics System-Integration Technology Conference (ESTC)

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Trends in power semiconductor devices are towards high integration and high performance, which impose ever increasing demands on their energy capability. The purpose of this paper is to demonstrate possibilities for optimization of the energy capability by considering the stack of layers in the power device and system for automotive applications. We classify the operation profiles into 3 categories: short pulse e.g. load short circuits (~100µs); medium pulse e.g. bulb or motor inrush (~ms range); and continuous power as in steady state. We demonstrate the impact parameters for these three application categories, in particular addressing how they interact with each other. In the end, optimization guidelines are presented which enable designers to achieve high system performance.

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Section: Introductionmentioning

confidence: 99%