Design and implementation of a novel asymmetrical multilevel inverter optimal hardware components

Abstract

Summary The paper developed a new topology for the single‐phase asymmetrical cascaded multilevel inverter and realized with optimal hardware components. This solution aids to substantially reducing the number of semiconductor switches and DC sources, henceforth reduces the gate drivers requirement. The proposed multilevel inverter creates a waveform with a high number of staircase voltage levels compromising with low total harmonic distortion at the outputs. The configuration is asymmetric and generates thirty‐one level different output voltages. MATLAB/Simulink numerical software used to verify the modeling and validated experimentally in laboratory scale prototype. The testing of the inverter executed under both steady state and dynamic load changing conditions. A set of numerical and experimental results are provided and shown clear evidence of satisfying the expectation with theoretical development. The proposed converter is well suitable for renewable energy applications. KEYWORDS asymmetrical invertermultilevel inverterrenewable energystaircase modulation techniquetotal harmonic distortionvoltage source inverter.

Design and Implementation of Multilevel Inverters for Fuel Cell Energy Conversion System

“…In the proposed MLI topology there is a bi-directional switch Sa, and it conducts at the time of instant't' then the average conduction losses are [39][40]…”

“…. is the peak voltage of the switch hence total switching losses of multilevel inverter is expressed as PSW = PSW, ON + PSW, OFF (27) Thus, the combination of conduction and switching losses gives the total power loss PL; it can be expressed as PL = PC + PSW (28) Further, the efficiency η for the proposed inverter is calculated as [39][40]…”

“…When VS is applied to switches, RS, Rd is the internal resistances of the transistor, diode respectively and Vd is the on-state voltage. The conduction losses (Pc) of diode Pcd and transistor Pcs are determined as follows[39][40] (t) = Vd i(t) + Rd i2(t)(18)(t) = Vs i(t) + [Rs iβ(t)]i(t)(19)Where β is a constant calculated from characteristics of a power switch. Assuming, there are Ns,on switches and Nd,on diodes are conduction at the time of instant 't' then the multilevel average conduction power losses are[39][40]…”

A New Three-Phase Multi-Level Asymmetrical Inverter With Optimum Hardware Components

“…Where V IGBT is IGBT forward voltage drop, and V_ d is diode drop forward voltage. The α is a constant for the IGBT specification [41,42], and R_ IGBT is the equivalent resistance of the IGBTs and R_ d is the equivalent resistance of the diodes [41,42]. The average value of the conductive power loss (P_ cl ) of the multilevel inverter can be given as follows [41][42], considering that the current path includes both N_ IGBT transistor and N_ d diodes at the moment t [47].…”

A New Configurable Topology for Multilevel Inverter With Reduced Switching Components

“…In symmetrical configurations, all dc voltages have the same magnitude whereas, in the asymmetrical configurations, the magnitude of dc voltages is of different values. Therefore, a higher number of levels can be generated with the same number of dc voltage sources and power devices in an asymmetrical configuration compared to the symmetrical mode of operation [7], [8]. In recent years, topologies in both symmetrical and asymmetrical configurations have been reported in several papers.…”