Design and optimization of stress/strain in GAA nanosheet FETs for improved FOMs at sub-7 nm nodes

Abstract

Stress/strain engineering techniques are employed to boost the performance of Gate-all-around (GAA) vertically stacked nanosheet field-effect transistors (NSFETs) for 7nm technology nodes and beyond. In this work, we report on the 3D numerical simulation study of the impacts of source/drain epitaxial and uniaxial strained-SiGe channel stresses on p-type NSFETs. It is shown that the uniaxial strained-SiGe channel improves the drive current by up to 107% due to higher compressive stress while the 3-stack NSFET can achieve an enhancement in drive current even up to 187% using a 30% Ge mole fraction. Furthermore, we compare the multiple stacked channel NSFETs and nanowire FETs (NWFETs) considering different strain techniques. As compared to a 3-stack strained-SiGe NWFET, NSFETs show 27% and 10% enhancements in ION and SS, respectively. Vertically stacked NSFETs are shown to be the best option to improve the hole mobility under biaxial and uniaxial compressive strain rather than NWFETs. We also look at how the Ge mole fraction affects various electrical properties in a uniaxial strained-SiGe channel with shrinking dimensions of scaled NSFETs. It is observed that for a fixed Lg, ION/IOFF ratio, SS and DIBL decrease with the increase in Ge mole fraction.

Design and performance analysis of tri-layered strained Si/Si1–x Ge x /Si heterostructure DG feedback FET

“…Another promising approach for device engineers is 'strained-Silicon (s-Si) based devices', which can significantly improve device performance [23][24][25]. To mitigate the negative effects of parasitic resistance and reduce the supply voltage in short-channel devices by increasing the effective carrier velocity in the channel, stress has been applied to MOSFETs [26].…”

“…However, uniaxial strain properties are strongly dependent on feature size, making scaling behavior less reliable. Therefore later, most of the pioneering work on s-Si has been focused on biaxial strain which is independent of device dimension [29][30][31]. The biaxial strain captured the interest of researchers in nano regime structures by further incorporating the quantum carrier confinement phenomena by lowering the thickness of the strain layers [32][33][34].…”

Interaction of Negative Bias Instability and Self-Heating Effect on Threshold Voltage and SRAM (Static Random-Access Memory) Stability of Nanosheet Field-Effect Transistors

“…Current research on NSFETs mainly focuses on improving electrical and radio frequency characteristics by optimizing the device structure [ 10 , 11 ]. Recently, researchers have begun to pay attention to the impact of reliability issues on NSFETs [ 12 , 13 ].…”