2019 IEEE Regional Symposium on Micro and Nanoelectronics (RSM) 2019
DOI: 10.1109/rsm46715.2019.8943541
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Design of 6T SRAM Cell Using Optimized 20 nm SOI Junctionless Transistor

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Cited by 4 publications
(1 citation statement)
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“…With heavy ion incident NMOS1, there are two processes, recovery and feedback, in the process of changing the Q-node voltage from 1 to 0. Whether the stored information in the SRAM changes depends on the competition between the recovery time and feedback time [17]. The recovery time refers to the time for the transient drain current generated by heavy ion irradiation to recover to 0, and the feedback time refers to the time required for the QN node voltage to change due to the Q node voltage drop.…”
Section: Influencing Factors Of Flip Thresholdsmentioning
confidence: 99%
“…With heavy ion incident NMOS1, there are two processes, recovery and feedback, in the process of changing the Q-node voltage from 1 to 0. Whether the stored information in the SRAM changes depends on the competition between the recovery time and feedback time [17]. The recovery time refers to the time for the transient drain current generated by heavy ion irradiation to recover to 0, and the feedback time refers to the time required for the QN node voltage to change due to the Q node voltage drop.…”
Section: Influencing Factors Of Flip Thresholdsmentioning
confidence: 99%