2000
DOI: 10.1109/40.888703
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Digital signal processor trends

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Cited by 100 publications
(42 citation statements)
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“…Studies with this technology show a large number of elements per chip, high precision and the high efficiency gain in comparison with DSP processors ( Figure 1). [4] showing the power consumption trends in DSP microprocessors along with data taken from a recent analog, floating-gate integrated chip developed by the CADSP team [5,6,7].…”
Section: State Of the Art In Reconfigurable Computingmentioning
confidence: 99%
“…Studies with this technology show a large number of elements per chip, high precision and the high efficiency gain in comparison with DSP processors ( Figure 1). [4] showing the power consumption trends in DSP microprocessors along with data taken from a recent analog, floating-gate integrated chip developed by the CADSP team [5,6,7].…”
Section: State Of the Art In Reconfigurable Computingmentioning
confidence: 99%
“…Dimension scaling in CMOS technologies has allowed a continuous reduction of the energy required by circuits for performing given tasks [1], which is an essential aspect for extending life of mobile, wearable, implantable devices our specific implementation, which is based on a commercial PT designed for Cold Cathode Fluorescent Lamps (CCFL) or Liquid Crystals Displays (LCD) backlight, the system can pump voltages as low as tens of mV up to voltage levels suitable to control the power devices of a DC/DC converter.…”
Section: Introductionmentioning
confidence: 99%
“…An analog controller must use a reconfigurable analog array instead of a DSP. The power consumption of a DSP halves every 18 months, as postulated by Gene's Law [7]. It is shown in [11], that using a reconfigurable analog array can decrease power consumed by five orders of magnitude as compared to a DSP, implying by Gene's Law a 20 year leap in power reduction.…”
Section: Introductionmentioning
confidence: 97%