Grain growth by micro-thermal-plasma-jet crystallization was controlled using very narrow amorphous silicon (a-Si) strips. With the decrease in strip width (W), grain boundaries were remarkably suppressed and no grain boundaries were formed at W= 0.3 m. By applying high-pressure water vapor annealing (HWA) after crystallization, defect concentration was reduced to less than 5.0 x 10 16 cm-3 , and as the result, significant improvements in mobility, threshold voltage (V th) controllability, and off-current were achieved.