Dynamically inserting, operating, and eliminating thermal sensors of FPGA-based systems

Abstract

In this paper, a new thermal monitoring strategy suitable for field programmable logic array (FPGA)-based systems is developed. The main idea is that a fully digital temperature transducer can be dynamically inserted, operated, and eliminated from the circuit under test using run-time reconfiguration. A ring-oscillator together with its auxiliary blocks (basically counting and control stages) is first placed in the design. After the actual temperature of the die is captured, the value is read back via the FPGA configuration port. Then, the sensor is eliminated from the chip in order to release programmable resources and avoid self-heating. All the hardware of the sensor is written in Java, using the JBits API provided by the chip manufacturer. The main advantage of the technique is that the sensor is completely stand-alone, no I/O pads are required, and no permanent use of any FPGA element is done. Additionally, the sensor is small enough to arrange an array of them along the chip. Thus, FPGAs became a new tool for researchers interested in the thermal aspects of integrated circuits.

Modeling and FPGA Implementation of a Thermal Peak Detection Unit for Complex System Design

“…8 is used, this study is found in [12] for T=25 °C, f=1 MHz. As an example it can be assumed that fa 1 = fc 1 = 1 MHz this new values should be replaced with those in (1) with this new value we will get Ts=1°C at the end.…”

“…Despite the use of the GDS method, the originality of this work rests on the modeling and implementation of a network of thermal sensors each one is actually a ring oscillator (RO) composed of six inverters to characterize the thermo mechanical stress of a complex system, Ring Oscillator (RO) and the GDS are explained in detail in [11] and [12]. Our methodology consists on the Development of a VHDL code to model the thermal peak localization equation under Matlab tool, using the GDS (gradient Direction Sensor) technique explained before, from each cell composed of three sensors we can obtain information on the temperature distribution and partly on the position of the heat source.…”

Designing a 3D tree-based FPGA: Optimization of butterfly programmable interconnect topology using 3D technology

“…Few reports [14], [15] have proposed the use of distributed sensors for monitoring temperatures in FPGAs. However, they consider only LBs in the FPGA fabric, and consequently, observed very little temperature variations across the die.…”

Exploring Temperature-Aware Design of Memory Architectures in VLIW Systems

“…There are other approaches which relay in dynamic measures to characterize the thermal behavior of the chip [8]. These techniques, opposite to ours, require not only the complete knowledge of the target architecture but also the capability to modify it.…”