Effect of Inserting Al2O3 Layer and Device Structure in HfO2-Based ReRAM for Low Power Operation

Kim, WanGee

doi:10.1109/imw.2012.6213681

Cited by 4 publications

(1 citation statement)

References 7 publications

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“…Device/process engineering is on-going to improve read disturb. [22][23][24][25] An alternative approach to reduce engineering development time is to employ circuit techniques. 26) In this work, circuit solutions are proposed which can improve reliability and speed: (i) bipolar verify reduces page write time by 68% and (ii) reverse read with dynamic write-back provides 5-times faster, disturb-free read.…”

Section: Introductionmentioning

confidence: 99%

Forward and Reverse Biasing in Resistive Memories for Fast, Disturb-Free Read, and Verify

Iwasaki

Ning

Takeuchi

2013

Jpn. J. Appl. Phys.

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The potential of resistive random access memory (ReRAM) to provide high speed operation is held back by the need to verify during set/reset, and sensitivity to read disturb. 50 nm HfO2 cells are measured for disturb in forward and reverse directions, and at 25 and 85 °C. Two circuit proposals provide speed and reliability improvement. First, bipolar verify reduces write time. If the verify direction matches the set/reset direction, read voltage can be increased, which reduces signal development time, and eliminates the need to switch the highly capacitive source line voltage. Secondly, reverse read with dynamic write-back provides fast, disturb-free read. A margin-check is performed in parallel to normal reverse-read. Disturb of the low resistance state is monitored, and then, if needed, set write-back occurs. Based on disturb data, write-back occurs infrequently, after ∼5×109 reads. By these two proposals, write time can be reduced by 3× and 5× faster read with disturb immunity can be achieved.

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Section: Introductionmentioning

confidence: 99%

Forward and Reverse Biasing in Resistive Memories for Fast, Disturb-Free Read, and Verify

Iwasaki

Ning

Takeuchi

2013

Jpn. J. Appl. Phys.

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Improvement of performances HfO 2 -based RRAM from elementary cell to 16 kb demonstrator by introduction of thin layer of Al 2 O 3

Azzaz

Benoist

Vianello

et al. 2016

Solid-State Electronics

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TCAD Simulation of Resistive Switching Devices: Impact of ReRAM Configuration on Neuromorphic Computing

Kim,

Lee

2024

Nanomaterials

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This paper presents a method for modeling ReRAM in TCAD and validating its accuracy for neuromorphic systems. The data obtained from TCAD are used to analyze the accuracy of the neuromorphic system. The switching behaviors of ReRAM are implemented using the kinetic Monte Carlo (KMC) approach. Realistic ReRAM characteristics are obtained through the use of the trap-assisted tunneling (TAT) model and thermal equations. HfO2-Al2O3-based ReRAM offers improved switching behaviors compared to HfO2-based ReRAM. The variation in conductance depends on the structure of the ReRAM. The conductance extracted from TCAD is validated in the neuromorphic system using the MNIST (Modified National Institute of Standards and Technology) dataset.

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Effect of Inserting Al2O3 Layer and Device Structure in HfO2-Based ReRAM for Low Power Operation

Cited by 4 publications

References 7 publications

Forward and Reverse Biasing in Resistive Memories for Fast, Disturb-Free Read, and Verify

Forward and Reverse Biasing in Resistive Memories for Fast, Disturb-Free Read, and Verify

Improvement of performances HfO 2 -based RRAM from elementary cell to 16 kb demonstrator by introduction of thin layer of Al 2 O 3

TCAD Simulation of Resistive Switching Devices: Impact of ReRAM Configuration on Neuromorphic Computing

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