Effects of Temperature and Supply Voltage on SEU- and SET-Induced Errors in Bulk 40-nm Sequential Circuits

Chen, R. M.; Diggins, Z. J.; Mahatme, N. N.; Wang, L.; Zhang, E. X.; Chen, Y. P.; Zhang, H.; Liu, Y. N.; Narasimham, B.; Witulski, A.F.; Bhuva, B. L.; Fleetwood, D. M.

doi:10.1109/tns.2017.2647749

Cited by 12 publications

(4 citation statements)

References 18 publications

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“…The SET pulsewidth in AS-FPGA without d-type flip-flop was randomly distributed from nanoseconds to a few tens of nanoseconds regardless of the operating frequency. Previous research related to these technology nodes has reported that the SET pulsewidth is a few hundreds of picoseconds [15], [16]. The SET pulsewidth acquired in this experiment showed one to two orders of magnitude greater than that of the previous study.…”

Section: Resultscontrasting

confidence: 62%

Single-Event Effects Induced on Atom Switch-based Field-Programmable Gate Array

Takeuchi

Sakamoto

Tada

et al. 2019

IEEE Trans. Nucl. Sci.

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Single-event effects (SEEs) of atom switches (ASs) embedded on 40-nm complementary metal-oxide-semiconductor (CMOS) are investigated with both heavy-ion and pulsed laser irradiation. In the evaluation of an AS-based field-programmable gate array (AS-FPGA), ASs show immunity against the irradiation and there is no change of the state of ASs both in a crossbar switch and memory in lookup tables (LUTs). ASs are not supposed to make any single-event transient (SET) noise when the ions hit. However, the CMOS layer shows SETs, and new approaches are proposed to solve the SET in CMOS, especially for AS-FPGA application. Index Terms-Atom switch (AS), heavy ions, pulsed laser, single-event effects (SEEs), single-event transient (SET).

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Section: Resultscontrasting

confidence: 62%

Single-Event Effects Induced on Atom Switch-based Field-Programmable Gate Array

Takeuchi

Sakamoto

Tada

et al. 2019

IEEE Trans. Nucl. Sci.

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“…[20] The critical charge changes with the circuit layouts and working conditions. [24][25][26][27] In Geant4 simulation, it is meaningful to study the influence of Q c on SEU by changing the LET th and the thickness of SV. [28][29][30] The SEU cross-sections of the whole three-layer die-stacked device versus neutron energy for different LET thresholds are shown in Fig.…”

Section: Influence Of Let Threshold and The Thickness Of Svmentioning

confidence: 99%

Neutron-induced single event upset simulation in Geant4 for three-dimensional die-stacked SRAM*

Mo¹,

Yan²,

Liu³

et al. 2021

Chinese Phys. B

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Three-dimensional integrated circuits (3D ICs) have entered into the mainstream due to their high performance, high integration, and low power consumption. When used in atmospheric environments, 3D ICs are irradiated inevitably by neutrons. In this paper, a 3D die-stacked SRAM device is constructed based on a real planar SRAM device. Then, the single event upsets (SEUs) caused by neutrons with different energies are studied by the Monte Carlo method. The SEU cross-sections for each die and for the whole three-layer die-stacked SRAM device is obtained for neutrons with energy ranging from 1 MeV to 1000 MeV. The results indicate that the variation trend of the SEU cross-section for every single die and for the entire die-stacked device is consistent, but the specific values are different. The SEU cross-section is shown to be dependent on the threshold of linear energy transfer (LETth) and thickness of the sensitive volume (Tsv). The secondary particle distribution and energy deposition are analyzed, and the internal mechanism that is responsible for this difference is illustrated. Besides, the ratio and patterns of multiple bit upset (MBU) caused by neutrons with different energies are also presented. This work is helpful for the aerospace IC designers to understand the SEU mechanism of 3D ICs caused by neutrons irradiation.

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“…This structure can inhibit the parasitic bipolar amplification effect in transistor, and consequently, reduce the SET pulse-width, meanwhile prevent the noise from substrate [13,14]. The well potential of transistor is also affected by parasitic resistance, external voltage, doping concentration and other factors [14,15,16,17]. With using the technology of radiation harden by design (RHBD) [18,19,20,21], the charge collection can be effectively mitigated by introducing the guard ring contact in triple-well CMOS process [22].…”

Section: Introductionmentioning

confidence: 99%

Physical mechanism study of N-well doping effects on the single-event transient characteristic of PMOS

Zhao

Peng

Liu

et al. 2019

IEICE Electron. Express

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N-well doping concentration plays an important role in singleevent transient (SET) characteristic of transistors. While adjusting the Nwell doping parameter within a proper range, it has little effect on the basic electrical performance of P-type MOSFET. The physical mechanism of well doping effects on the SET of PMOS is observed. The collapse and recovery of N-well potential, which are the critical factors that influences the SET pulse width, are analyzed by TCAD simulations. The result shows that well doping concentration could affect not only the rate of well potential recover to its equilibrium value, but the potential gradient induced by localized collapse of N-well potential between ion-strike path and source. Energy band analysis is also carried out under the triple well structure, and results show that an increase in well doping concentration will elevate the barrier of reverse-biased P-N junction and therefore cause the accumulation of holes in well, elevating the well potential, and consequently, inhibiting the parasitic bipolar amplification effect.

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Effects of Temperature and Supply Voltage on SEU- and SET-Induced Errors in Bulk 40-nm Sequential Circuits

Cited by 12 publications

References 18 publications

Single-Event Effects Induced on Atom Switch-based Field-Programmable Gate Array

Single-Event Effects Induced on Atom Switch-based Field-Programmable Gate Array

Neutron-induced single event upset simulation in Geant4 for three-dimensional die-stacked SRAM*

Physical mechanism study of N-well doping effects on the single-event transient characteristic of PMOS

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