Electrical characterization of trapping phenomena at SiO₂ /SiC and SiO₂ /GaN in MOS-based devices

Abstract

In this paper, some aspects of the electrical characterization of trapping phenomena occurring at interfaces between insulators and wide band semiconductors (WBG) are presented, with a focus on the SiO 2 /SiC and SiO 2 /GaN systems. In particular, time resolved capacitance, current measurements, and parallel conductance measurements as a function of frequency were correlated to investigate trapping states in SiC and GaN MOSstructures, allowing to distinguish between slow and fast states in these systems. Furthermore, gate current measurements enabled us to get insights into the near interface traps (NITs) present inside the SiO 2 layer. Evidently, in these systems, although postoxide deposition annealing treatments can reduce the interface traps (down to the 10 11 -10 12 cm À2 eV À1 range), the presence of the NITs is responsible for an anomalous behavior of the current conduction, penalizing the threshold voltage stability. Timedependent current and conductance measurements, performed in appropriate bias ranges, enabled to determine the density of NITs (1 Â 10 11 cm À2 ). The impact of the observed trapping phenomena on the SiO 2 /SiC(GaN) transistor operation is briefly discussed.

Characterization and Modeling of BTI in SiC MOSFETs

“…More specifically, the threshold voltage shift (∆V th ) in SiC-MOSFETs under positive and negative gate biases are significantly higher, though recovering faster, than the ones observed in Si-MOSFETs [2]. The latter is due to the presence of a high density of electrically active defects at the SiC/SiO 2 interface, with at least two orders of magnitude higher concentrations compared to the Si/SiO 2 systems [3] [4]. The improvement of the SiC/SiO 2 interface is of vital importance for MOS applications, because charged interface traps directly affect not only the threshold voltage but also the channel mobility.…”

Design of an Advanced Programmable Current-Source Gate Driver for Dynamic Control of SiC Device

“…The so-called interfacial electron trapping effect is reported as a significant problem in SiC device, reducing the inversion channel mobility severely [9]. Although all the trapping phenomena are suppressed by using purer substrate [10], the high density of electrically active defects of SiO2/SiC remains a limitation, as the magnitude is at least 1-2 orders higher compared to the SiO2/Si system [11]. As the SiC device is more sensitive to the gate voltage/current signal, the conventional voltage source gate driver can pose reliability problem to SiC device.…”

Determining oxide trapped charges in Al2O3insulating films on recessed AlGaN/GaN heterostructures by gate capacitance transients measurements

“…In general, assuming a continuum Gaussian distribution of traps levels, G p =ω vs frequency can be expressed as 45)…”