1998
DOI: 10.1016/s0026-2714(98)00122-x
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Electromigration failure modes in damascene copper interconnects

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Cited by 23 publications
(7 citation statements)
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“…[1][2][3][4][5][6][7] In fact, the electromigration mechanism leading to failure in Cu is a controversial topic as many studies conducted with various testing methods have produced wide-ranging activation energies, 8 implying that the dominant failure mechanism is highly dependent on sample configuration and test method. Although lower resistivity provides the possibility of improved circuit performance and reliability, the accompanying change in manufacturing methods and simultaneous decrease in feature size has altered the factors influencing interconnect failure, making Cu-interconnect failure mechanisms a critical research area.…”
Section: Introductionmentioning
confidence: 99%
“…[1][2][3][4][5][6][7] In fact, the electromigration mechanism leading to failure in Cu is a controversial topic as many studies conducted with various testing methods have produced wide-ranging activation energies, 8 implying that the dominant failure mechanism is highly dependent on sample configuration and test method. Although lower resistivity provides the possibility of improved circuit performance and reliability, the accompanying change in manufacturing methods and simultaneous decrease in feature size has altered the factors influencing interconnect failure, making Cu-interconnect failure mechanisms a critical research area.…”
Section: Introductionmentioning
confidence: 99%
“…Failure‐in‐time (FIT) is another way of reporting MTBF and is defined as the number of failures per million hours for a repairable product, with 1 FIT being equivalent to having an MTBF of 10 9 hours. The terms MTBF and FIT are commonly used by the semiconductor industry and component manufacturers, whereas many quantitative reliability studies involving Cu‐plated interconnects have used MTTF as typically the failure mechanisms are non‐repairable (eg, voiding due to electromigration).…”
Section: Challenges For Copper‐plated Silicon Solar Cellsmentioning
confidence: 99%
“…To introduce Cu into metal/via interconnections, the dual damascene process is required because Cu is difficult to etch. [1][2][3][4] Conventional physical vapor deposition ͑PVD͒ techniques are inadequate for filling sub-0.18 m and high-aspect-ratio trenches/vias. Accumulation of deposits at the upper corners of trenches/vias leads to pinch-off and void formation.…”
Section: Introductionmentioning
confidence: 99%