Electroplating Characteristics of Eutectic Sn–Cu Ions for Micro-Solder Bump on a Si Chip

Park, Jun-Kyu; Lee, Ki-Ju; Jung, Jae Pil

doi:10.1166/jnn.2012.5621

Cited by 5 publications

(5 citation statements)

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“…The highest and widest points of each bump measured by the i-Solution program were considered to be the width and height of the bump. The uniformity was calculated using the relation: [100-(Std/Ave) × 100 (%)] [27], where Std represents the standard deviation from the mean bump height and Ave indicates the mean bump height.…”

Section: Methodsmentioning

confidence: 99%

Non-PR Sn-3.5Ag Bumping on a Fast Filled Cu-Plug by PPR Current

Hong

Jung

Lee

et al. 2013

IEEE Trans. Compon., Packag. Manufact. Technol.

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The electroplating of Sn-3.5 wt% Ag bumps without a photoresist (PR) mould on a Si chip was performed to reduce the production steps and cost for 3-D chip stacking. The electroplating characteristics of Sn-Ag and Sn-Ag bump growth were examined. The Sn-Ag bumps were electroplated on the Cuplugged TSVs (through-silicon vias) of a Si chip. The Cu plug in the via was produced using a high-speed Cu filling process by a periodic pulse reverse current waveform. The electroplating current was supplied to the exposed Cu surface in the TSVs to produce the Sn-3.5Ag bumps. As the experimental results show, the Sn-3.5Ag bumps were fabricated successfully without a PR mould, with no serious defects by electroplating. The Ag contents in the Sn-Ag bump decreased with increasing current density. Besides, the bump height and width increased with increasing plating time. The bump width grew isotropically because of the absence of a PR mould. The Sn-3.55 wt% Ag bumps were obtained at a current density of −55 mA/cm 2 for 20 min on the Cu plugs.Index Terms-3-D packaging, electroplating, photoresist mould, Sn-3.5Ag bump, through-silicon via.

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Section: Methodsmentioning

confidence: 99%

Non-PR Sn-3.5Ag Bumping on a Fast Filled Cu-Plug by PPR Current

Hong

Jung

Lee

et al. 2013

IEEE Trans. Compon., Packag. Manufact. Technol.

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“…For all the bumps, the bump height and width increased with increased plating time, as shown in Figure 18a and b respectively. Similarly, in Sn-Cu bumping, by electroplating in the condition of 2.5 A/dm 2 for 10 min, bumps 20 × 20 × 10 µm 3 in size with 50 µm of bump pitch were formed [84]. A near eutectic Sn-0.72 wt % Cu bump was produced in the plating condition of a reduction current density of 1 A/dm 2 for 23 min.…”

Section: Solder Bump By Electroplatingmentioning

confidence: 99%

“…In Sn-3.5Ag bumping, using Equation ( 9), Jun et al [83] reported the cathodic current efficiency (ε) for the Sn-3.5Ag bump as 45.05% [Ec = 0.04358494 g/C, i = 30 mA/cm 2 , ρ = 7.412 g/cm 3 for Sn-3.5Ag]. Park et al [84] studied the Sn-Cu solder bump height variation by increasing the deposition time from 1 to 35 min for a current density ranging from 1 to 5 A/dm 2 . The plating rate of the near-eutectic Sn-Cu bump increased linearly from 0.27 to 2.28 µm/min by increasing the current density from 1 to 5 A/dm 2 .…”

Section: Solder Bump By Electroplatingmentioning

confidence: 99%

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A Review on the Fabrication and Reliability of Three-Dimensional Integration Technologies for Microelectronic Packaging: Through-Si-via and Solder Bumping Process

Cho

Seo

Kim

et al. 2021

Metals

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With the continuous miniaturization of electronic devices and the upcoming new technologies such as Artificial Intelligence (AI), Internet of Things (IoT), fifth-generation cellular networks (5G), etc., the electronics industry is achieving high-speed, high-performance, and high-density electronic packaging. Three-dimensional (3D) Si-chip stacking using through-Si-via (TSV) and solder bumping processes are the key interconnection technologies that satisfy the former requirements and receive the most attention from the electronic industries. This review mainly includes two directions to get a precise understanding, such as the TSV filling and solder bumping, and explores their reliability aspects. TSV filling addresses the DRIE (deep reactive ion etching) process, including the coating of functional layers on the TSV wall such as an insulating layer, adhesion layer, and seed layer, and TSV filling with molten solder. Solder bumping processes such as electroplating, solder ball bumping, paste printing, and solder injection on a Cu pillar are discussed. In the reliability part for TSV and solder bumping, the fabrication defects, internal stresses, intermetallic compounds, and shear strength are reviewed. These studies aimed to achieve a robust 3D integration technology effectively for future high-density electronics packaging.

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“…As for 3D packaging, the higher density of patterns and the more complex circuit lead to the inevitable requirement of electrodeposition for solder bump fabrication. 2,3 Compared to the other solder bump preparation methods including solder preform 4 and sputtering, 5 electroplating has outstanding advantages such as high deposition rate, controllable micro-pattern formation, cost-effective and less time-consuming. As a result, electroplating is recommended as a practical and promising technology for solder bump manufacturing.…”

mentioning

confidence: 99%

Complexation Behavior and Co-Electrodeposition Mechanism of Au-Sn Alloy in Highly Stable Non-Cyanide Bath

Huang

2018

J. Electrochem. Soc.

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The complexation behavior and co-electrodeposition mechanism of Au-Sn alloy in a highly stable non-cyanide bath were studied by electrochemical analysis and quantum chemical calculation based on density functional theory (DFT). The interactions between metal ions and multiple complexing agents were revealed, and the mechanism on the high stability of the Au-Sn bath was clarified. The complexing agents potassium pyrophosphate (K 4 P 2 O 7 ) and ethylene diamine tetraacetic acid (EDTA) have a synergetic complexation to Sn ions, which exist in one valence state of Sn 2+ to form three complex ions, i.e., [Sn(P 2 O 7 )] 2− , [Sn(P 2 O 7 ) 2 ] 6− and Sn-EDTA; while the complexing agents of 5,5-dimethylhydantoin (DMH) and sodium sulfite (Na 2 SO 3 ) have a complexation to Au ions, which exist in two different valence states (i.e., Au 3+ and Au + ) to form two complex ions of [Au(DMH) 4 ] − and Au[(SO 3 ) 2 ] 3− . Moreover, the existence of [Au(DMH) 4 ] − inhibits the decomposition of [Au(SO 3 ) 2 ] 3− . Meanwhile, EDTA participates in some form of coordination with Au + , inhibites the decomposition of [Au(SO 3 ) 2 ] 3− and facilitates the reduction of [Au(SO 3 ) 2 ] 3− . The co-electrodeposition of Au-Sn alloy is a diffusion-controlled process, and the nucleation of Au-Sn alloy is a progressive nucleation process. The antioxidant catechol significantly increases the overpotential of Au-Sn co-electrodeposition and improves the brightness of electrodeposited films of Au-Sn alloys.

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Electroplating Characteristics of Eutectic Sn–Cu Ions for Micro-Solder Bump on a Si Chip

Cited by 5 publications

References 0 publications

Non-PR Sn-3.5Ag Bumping on a Fast Filled Cu-Plug by PPR Current

Non-PR Sn-3.5Ag Bumping on a Fast Filled Cu-Plug by PPR Current

A Review on the Fabrication and Reliability of Three-Dimensional Integration Technologies for Microelectronic Packaging: Through-Si-via and Solder Bumping Process

Complexation Behavior and Co-Electrodeposition Mechanism of Au-Sn Alloy in Highly Stable Non-Cyanide Bath

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