Embedded micromechanical devices for the monolithic integration of MEMS with CMOS

Smith, James H.; Montague, Stephen; Sniegowski, J.J.; Murray, James R.; McWhorter, P.J.

doi:10.1109/iedm.1995.499295

Cited by 90 publications

(28 citation statements)

References 2 publications

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“…The M 3 EMS (Modular, Monolithic MicroElectroMechanical Systems) technology developed at Sandia National Laboratories was one of the earliest demonstrations of the MEMS-first integration concept [ 16 ]. In this approach, a multi-layer polysilicon microstructure is built in a trench, which has been etched into the silicon substrate by wet anisotropic etching.…”

Section: Pre-cmos Micromachiningmentioning

confidence: 99%

CMOS-Based Microsensors

Brand

Seo

2006

ECS Trans.

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Section: Pre-cmos Micromachiningmentioning

confidence: 99%

CMOS-Based Microsensors

Brand

Seo

2006

ECS Trans.

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“…Wafer-level approaches demonstrating the integration of microelectromechnical systems (MEMS) with active electronics have been reported using less common processes as early as 1995 [11][12][13]. Gianchandani et al demonstrated processes involving the integration of active ICs with an electrochemical etch stop and bulk micromachined accelerometers with a boron impurity etch stop.…”

Section: Heterogeneous Integrationmentioning

confidence: 99%

“…This early demonstration of interwafer interconnection, that the active electronics were unaffected by the bulk etch and that the structural integrity of the accelerometers was maintained throughout the process, was an important step in wafer-level heterogeneous integration. Other early approaches to integration of MEMS were also FACTORS MOTIVATING RESEARCH IN 3D reported in 1995 [12,13], and a later review paper summarized the advantages of wafer bonding [14].…”

Section: Heterogeneous Integrationmentioning

confidence: 99%

Three‐Dimensional (3D) Integration

McMahon

Gutmann

2007

Microelectronic Applications of Chemical Mechanical Planarization

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Three-dimensional (3D) integration with interstrata vias has the potential of improving system performance while providing a platform for heterogeneous integration. Performance improvement in 3D integrated circuits (ICs) is mainly due to the reduction of interconnect length, which decreases interconnect delay and power consumption [1,2]. Small form factor is achieved in 3D ICs due to the stacking of active device layers one on top the other. A path for heterogeneous integration is realized if this stacking is done in a fashion that is back-end-of-line (BEOL) compatible, because interconnecting devices using fully fabricated wafers can reduce process incompatibilities.Approaches to 3D integration are often divided into die-level approaches and wafer-level approaches. Most often, the heterogeneous integration and small form factor advantages are obtained with die-level approaches; in addition, high performance and low manufacturing cost can be achieved with wafer-level approaches.CMP has permeated many aspects of IC processing but is particularly a dominant factor in BEOL interconnection. Copper damascene patterning has become the standard methodology for building a large number of interconnect layers in the vast majority of high-performance ICs. In 3D ICs, CMP is also critical in backside thinning, surface roughness reduction, and, in particular, feature topography control. Topography mitigation can particularly be a critical Microelectronic Applications of Chemical Mechanical Planarization, Edited by Yuzhuo Li

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“…The advantages of MEMS technologies lie in the improvement of the product performance, the new functionalities, the reduction of energy consumption, the mass production, the miniaturization and the increased reliability and integration. They are also compatible with CMOS IC so that electronics could be integrated in the same process [1]. This makes today MEMS technology in a mass production phase for many applications with a huge future prospect as can be seen from the market of inkjet heads, pressure sensors and MEMS based μ-displays.…”

Section: Introductionmentioning

confidence: 97%

Harmonic analysis method for electromechanical characterizations of MEMS based energy harverters

Bounouh

Bélières

2012

2012 Conference on Precision Electromagnetic Measurements

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This paper presents an experimental method based on harmonic distortion analysis to determine mechanical characteristics of MEMS devices to be used as energy scavengers or more generally in widespread MEMS -based applications. This technique uses the mechanical-electrical analogy of MEMS variable capacitor acting as a low -pass filter to give access to both resonant frequency and damping factor of the mechanical system through the determination of the filter parameters as the cut-off frequency. Characteristics of various MEMS devices have been measured using this method and the results are compared to measurements of their resonant frequencies carried out with Deep Level Transient Spectroscopy measurement system.

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Embedded micromechanical devices for the monolithic integration of MEMS with CMOS

Cited by 90 publications

References 2 publications

CMOS-Based Microsensors

CMOS-Based Microsensors

Three‐Dimensional (3D) Integration

Harmonic analysis method for electromechanical characterizations of MEMS based energy harverters

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