Enabling Energy Efficiency and Polarity Control in Germanium Nanowire Transistors by Individually Gated Nanojunctions

Abstract

Germanium is a promising material for future very large scale integration transistors, due to its superior hole mobility. However, germanium-based devices typically suffer from high reverse junction leakage due to the low band-gap energy of 0.66 eV and therefore are characterized by high static power dissipation. In this paper, we experimentally demonstrate a solution to suppress the off-state leakage in germanium nanowire Schottky barrier transistors. Thereto, a device layout with two independent gates is used to induce an additional energy barrier to the channel that blocks the undesired carrier type. In addition, the polarity of the same doping-free device can be dynamically switched between p- and n-type. The shown germanium nanowire approach is able to outperform previous polarity-controllable device concepts on other material systems in terms of threshold voltages and normalized on-currents. The dielectric and Schottky barrier interface properties of the device are analyzed in detail. Finite-element drift-diffusion simulations reveal that both leakage current suppression and polarity control can also be achieved at highly scaled geometries, providing solutions for future energy-efficient systems.

Inherent Charge-Sharing-Free Dynamic Logic Gates Employing Transistors With Multiple Independent Inputs

“…Further skewing into one or the other direction can be achieved by using source and drain materials with different workfunctions to each other, in order to obtain a work function offset between source and drain contact, as already explored in 2-D Materials [26], [27]. Beyond this, it has been demonstrated that germanium and silicon-germanium channel materials further reduce V TH and increase the on-currents of MIGFETs [28], [29]. Another very straightforward improvement is to apply the clock signal not to a gate aligned on-top of the Schottky barrier, but to one of the channel gates, which perform slightly better even under skewed conditions, as discussed earlier in this section.…”

Quantitative Characterization of Reconfigurable Transistor Logic Gates

“…We target the design of standard-cell libraries for emerging devices with enhanced functionality. To showcase our method, we have chosen the Germanium-based reconfigurable field effect transistor (RFET) from [13] as an exemplary technology. Transistor reconfiguration switches a transistor between Pand N-type carrier transport dynamically [1]- [4], [13].…”

“…To showcase our method, we have chosen the Germanium-based reconfigurable field effect transistor (RFET) from [13] as an exemplary technology. Transistor reconfiguration switches a transistor between Pand N-type carrier transport dynamically [1]- [4], [13]. Additionally, multiple gates are used to intrinsically support the AND-functionality, as demonstrated for a similar technology based on Silicon [5], [14].…”

Top-Down Fabricated Reconfigurable FET With Two Symmetric and High-Current On-States

“…Several RFETs have been experimentally demonstrated based on bottom-up grown Si or Ge nanowires [7]- [11], carbon nanotubes [12] or two-dimensional materials [13]- [16]. Low band-gap channel materials like Ge are beneficial to increase the current close to CMOS levels [17].…”