Endurance improvements and defect characterization in ferroelectric FETs through interface fluorination

Synergistic Approach of Interfacial Layer Engineering and READ-Voltage Optimization in HfO2-Based FeFETs for In-Memory-Computing Applications

“…As they cannot easily detrap, compared to SiON, a memory closure is observable, as these charges will pin domains and shift the internal bias field. This effect has recently been explored as well for fluorinated interfaces, reporting consistent results with the here presented data.…”

“…31−33 Numerous efforts have been made to reduce the impacts of such nonidealities from the device process, and a circuit point of view. [34][35][36][37][38][39]23,25 Previously, it has been reported how the quality of the interface and the READ-Voltage play a pivotal role in the performance of FeFETs, especially for low-frequency noise response, retention, and endurance. 40,41,25,21,42−44 In this work, we aim to maximize the reliability and performance of FeFETs by adopting a synergistic approach of READ-voltage optimization and interfacial-layer engineering.…”

“…46 The detailed method of low-frequency noise investigation is demonstrated in our previous work. 37 Electric field cycling was applied for endurance measurement with amplitudes in the ±6 V range and a pulse width of 500 ns.…”

“…Among many emerging memory technologies like resistive random access memory (ReRAM) − and phase change memory (PCM), − ferroelectric field effect transistors (FeFETs) seem to be the most promising ones. The pronunciation of ferroelectricity in a single-layer thin film of hafnium oxide (HfO 2 ), fast switching, high on-current ( I ON ) to off-current ( I OFF ) ratio ( I O N I O F F ) , excellent linearity in synaptic weight updates, bidirectional operation, and good endurance are the key technological factors that make FeFET superior to other methods. ,− ,, However, the primary bottleneck in implementing the FeFET-based computing system lies in the intrinsic stochasticity owing to the polycrystalline nature of HfO 2 -based ferroelectric thin film, as well as inherent defect sites that may capture electrons or holes from the channel side (CS) or gate side (GS). − Numerous efforts have been made to reduce the impacts of such nonidealities from the device process, and a circuit point of view. − ,, Previously, it has been reported how the quality of the interface and the READ -Voltage play a pivotal role in the performance of FeFETs, especially for low-frequency noise response, retention, and endurance. ,,,,− In this work, we aim to maximize the reliability and performance of FeFETs by adopting a synergistic approach of READ -voltage optimization and interfacial-layer engineering.…”

Monolithic-3D Inference Engine with IGZO Based Ferroelectric Thin Film Transistor Synapses

“…These changes in both cases can be based on interface defects and occur especially after a high number of cycles. An in-depth analysis and detailed understanding of the defect behaviour of the ferroelectric layer and the interface can be found elsewhere [79]. Summarized, it is a trade of between a better S th S or a better µ ef f performance, that means to avoid mobility variations as well as a significant change of the S th S is a combination of the pulse width and amplitude change in programming the devices.…”