Energy Efficient Bootstrapped CMOS Large RC-Load Driver Circuit for Ultra Low-Voltage VLSI

Abstract

This paper presents an energy efficient bootstrapped CMOS driver to enhance the switching speed for driving large RC load for ultra-low-voltage CMOS VLSI. The proposed bootstrapped driver eliminates the leakage paths in the conventional bootstrapped driver to achieve and maintain more positive and negative boosted voltage levels of the boosted nodes, thus improving boosting efficiency and enhancing driver switching speed. Measured performance from test chips implemented with UMC 65 nm low-power CMOS technology (VTN ≈ VTP ≈ 0.5 V) indicates that the proposed driver provides a rising-delay improvement of 37%-50% and a falling-delay improvement of 25%-47% at 0.3 V for a loading ranging from a 0 to 24 mm long M6 metal line compared with the conventional bootstrapped driver. Although designed and optimized for subthreshold ultra low-voltage operation, the proposed bootstrapped driver is shown to be advantageous at higher nearly-threshold supply voltage as well. The proposed driver provides a rising delay improvement of 20% to 52% and a falling delay improvement of 23%-43% for VDD ranging from 0.3 V to 0.5 V, while consuming about 15% less average power than the conventional bootstrapped driver driving a 16 mm long M6 wire.

Enhanced bootstrapped CMOS driver for large RC-load and ultra-low voltage VLSI

“…(a) bootstrapped CMOS driver [2], (b) energyefficient bootstrapped CMOS driver [3] by the leakage through MP4. Shallow boosted voltages by these effects cause speed degradation.…”

“…1 (b) was proposed [3]. It uses four extra transistors (MN5, MN6, MP5, and MP6) to eliminate the leakage through MN4 and MP4 in the driver.…”

“…Using a bootstrapped CMOS circuit [2,3] is a viable solution to overcome the drawback, which enhances the switching speed by forcing the gate voltage of transistors to be beyond the supply rails by capacitive coupling. But, the conventional bootstrapped CMOS driver in [2] inherently has a substantial amount of leakage, resulting in increased power and degraded speed.…”

“…But, the conventional bootstrapped CMOS driver in [2] inherently has a substantial amount of leakage, resulting in increased power and degraded speed. The conventional bootstrapped CMOS driver in [3] can eliminate the leakage, but since the driver uses a larger number of transistors, it still has large power consumption, degraded speed, and increased layout area.…”

“…This letter proposes a novel bootstrapped CMOS driver that addresses the leakage problem of the conventional bootstrapped driver in [2] in a more efficient manner than the approach presented in [3]. In Section 2, conventional bootstrapped drivers are described, and their limitations are discussed.…”