Enhanced bootstrapped CMOS driver for large RC-load and ultra-low voltage VLSI

Abstract

This letter describes a novel bootstrapped CMOS driver for driving a large RC load in ultra-low voltage VLSI. The proposed driver eliminates the leakage from boosted nodes during bootstrapping operations, resulting in lower power consumption and higher switching speed. Since the proposed driver requires no additional transistors for eliminating the leakage, further improvements on switching speed and power consumption as well as layout area are achieved. Comparison results in a 0.13 µm CMOS technology indicated that the proposed bootstrapped CMOS driver achieved 82%∼18% improvements in terms of power consumption as compared to conventional bootstrapped CMOS drivers. They also indicated that the proposed driver achieved 42%∼11% improvements in terms of switching speed. Improvement on power-delay product (PDP) is as much as 160%∼30% as compared to conventional bootstrapped drivers.