ESD characterization of a 190V LIGBT SOI ESD power clamp structure for plasma display panel applications

Jiang, Lingli; Fan, Heng; Qiao, Ming; Zhang, Bo; Li, Zhaoji

doi:10.1016/j.microrel.2013.02.002

Cited by 1 publication

(1 citation statement)

References 13 publications

(11 reference statements)

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“…In 2011, a composite MOS-IGBT-SCR device with high ESD robustness was proposed [5] . It is a good choice for power clamp circuit; In 2013, a new SOI-LIGBT device with anode/cathode segmental injection technology was proposed, which can effectively improve the holding voltage and reduce the risk of latchup under ESD stress [6] ; In 2013, a SOI-LIGBT structure with no risk of latch-up was proposed [7] . The device has high robustness and can replace the conventional diode as a new ESD protection device in high-voltage integrated circuits; In 2014, a novel LIGBT structure with w-shaped buffer window was proposed [8] .…”

Section: Introductionmentioning

confidence: 99%

Design and analysis of a NMOS triggered LIGBT structure for electrostatic discharge protection

Cheng

Zhang

et al. 2019

J. Semicond.

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A novel NMOS triggered LIGBT (NTLIGBT) structure is proposed for electrostatic discharge (ESD) protection in this paper. The structure utilizes internal NMOS to trigger SCR-like structure in LIGBT. The trigger voltage is significantly reduced because the embedded NMOS causes N+-drain/P-body junction being apt to avalanche breakdown. At the same time, the new parasitic PNP transistor including the newly added P+-region as a collector forms another path to bleed ESD current and then the conductivity modulation in the LIGBT is weakened. As a result, the holding voltage is increased. So, the proposed NTLIGBT structure has a narrow ESD design window. The simulation results show an improvement of 71.5% in trigger voltage and over 50% in holding voltage comparing with the conventional LIGBT structure.

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