Experiences and lessons learned with a portable interface to hardware performance counters

Dongarra, Jack; London, Kevin S.; Moore, Shirley; Mucci, Philip J.; Terpstra, Dan; You, Haihang; Zhou, Min

doi:10.1109/ipdps.2003.1213517

Cited by 38 publications

(25 citation statements)

References 9 publications

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“…It just reports one single number. Also in the context of PAPI, Dongarra et al [3] mention potential sources of inaccuracy in counter measurements. They point out issues such as the extra instructions and system calls required to access counters, and indirect effects like the pollution of caches due to instrumentation code, but they do not present any experimental data.…”

Section: Related Workmentioning

confidence: 99%

Accuracy of performance counter measurements

Zaparanuks

Jovic

Hauswirth

2009

2009 IEEE International Symposium on Performance Analysis of Systems and Software

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Many workload characterization studies depend on accurate measurements of the cost of executing a piece of code. Often these measurements are conducted using infrastructures to access hardware performance counters. Most modern processors provide such counters to count micro-architectural events such as retired instructions or clock cycles. These counters can be difficult to configure, may not be programmable or readable from user-level code, and can not discriminate between events caused by different software threads. Various software infrastructures address this problem, providing access to per-thread counters from application code. This paper constitutes the first comparative study of the accuracy of three commonly used measurement infrastructures (perfctr, perfmon2, and PAPI) on three common processors (Pentium D, Core 2 Duo, and AMD ATHLON 64 X2). We find significant differences in accuracy of various usage patterns for the different infrastructures and processors. Based on these results we provide guidelines for finding the best measurement approach.

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Section: Related Workmentioning

confidence: 99%

Accuracy of performance counter measurements

Zaparanuks

Jovic

Hauswirth

2009

2009 IEEE International Symposium on Performance Analysis of Systems and Software

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“…≥ 2.5). To monitor the performance of code sections, we use PAPI [22] which provides an interface to control and access the processor hardware performance counters.…”

Section: Analysis and Instrumentation Frameworkmentioning

confidence: 99%

Phase-based tuning for better utilization of performance-asymmetric multicore processors

Sondag

Rajan

2011

International Symposium on Code Generation and Optimization (CGO 2011)

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Abstract-The latest trend towards performance asymmetry among cores on a single chip of a multicore processor is posing new challenges. For effective utilization of these performanceasymmetric multicore processors, code sections of a program must be assigned to cores such that the resource needs of code sections closely matches resource availability at the assigned core. Determining this assignment manually is tedious, error prone, and significantly complicates software development. To solve this problem, we contribute a transparent and fully-automatic process that we call phase-based tuning which adapts an application to effectively utilize performance-asymmetric multicores. Compared to the stock Linux scheduler we see a 36% average process speedup, while maintaining fairness and with negligible overheads.

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“…MR does up to 66x fewer flops than DC, and never more than twice as many, with a median of 8.3x fewer flops than DC for large matrices. Figure 4.3 shows the flop counts of each algorithm relative to the one of MR. PAPI [15] was used to obtain the flop counts. Runtime of all algorithms on Opteron.…”

Section: Performance Details For Practicalmentioning

confidence: 99%

Performance and Accuracy of LAPACK's Symmetric Tridiagonal Eigensolvers

Demmel¹,

Marques²,

Parlett³

et al. 2008

SIAM J. Sci. Comput.

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Abstract. We compare four algorithms from the latest LAPACK 3.1 release for computing eigenpairs of a symmetric tridiagonal matrix. These include QR iteration, bisection and inverse iteration (BI), the Divide-and-Conquer method (DC), and the method of Multiple Relatively Robust Representations (MR).Our evaluation considers speed and accuracy when computing all eigenpairs, and additionally subset computations. Using a variety of carefully selected test problems, our study includes a variety of today's computer architectures.Our conclusions can be summarized as follows. (1)

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Experiences and lessons learned with a portable interface to hardware performance counters

Cited by 38 publications

References 9 publications

Accuracy of performance counter measurements

Accuracy of performance counter measurements

Phase-based tuning for better utilization of performance-asymmetric multicore processors

Performance and Accuracy of LAPACK's Symmetric Tridiagonal Eigensolvers

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