Experimental Study on Electron Mobility in Accumulation-Mode Silicon-on-Insulator Metal–Oxide–Semiconductor Field-Effect Transistors

Abstract

Junctionless, or accumulation-mode, metal–oxide–semiconductor field-effect transistors (MOSFETs), where the channel and source/drain doping types are the same, have attracted growing interests because of their simpler fabrication processes. However, carrier transport properties, in particular, mobility characteristics, in the junctionless silicon-on-insulator (SOI) MOSFETs have been less studied. Although higher mobility in accumulation-mode SOI MOSFETs has been reported, the physical mechanisms of the higher mobility have not yet been clarified. In this work, the physical mechanisms of higher mobility in accumulation-mode MOSFETs have been investigated. We fabricated junctionless SOI MOSFETs with a channel doping concentration of 1×1017 cm-3 and an SOI body thickness of 48 nm whose mobility is greater than the bulk universal mobility in spite of the high doping concentration in the channel. The drain current consists of two components: one in the accumulation layer and the other in the SOI body. The mobility of each component is evaluated separately. As a result, it is revealed that the total mobility is the weighted mean of the two mobility components, where carrier concentration is the weight.

Impact of Deformation Potential Increase at Si/SiO2 Interfaces on Stress-Induced Electron Mobility Enhancement in Metal–Oxide–Semiconductor Field-Effect Transistors

“…In this paper, SOI MOSFETs with the same doping type for the channel as that for the source/drain are described as bodychannel SOI MOSFETs because electrons flow in the entire region of the SOI layer at the operation V g . [16][17][18][19] The phosphorus concentration in SOI is approximately 5 Â 10 15 cm À3 . T SOI is 150 nm.…”

Impact of Gate Poly Depletion on Evaluation of Channel Temperature in Silicon-on-Insulator Metal–Oxide–Semiconductor Field-Effect Transistors with Four-Point Gate Resistance Measurement Method

“…Silicon-on-insulator (SOI) metal-oxide-semiconductor field-effect transistors (MOSFETs) have attracted much attention, because of their superior electrostatic characteristics, which are effective for suppressing short-channel effects (SCEs). [1][2][3] Three-dimensional-structure MOSFETs such as FinFETs and tri-gate FETs, where SOI substrates are utilized, are strong candidates for the 16 nm technology node and beyond. However, in SOI MOSFETs, the increased channel temperature (T ch ) may decrease the reliability of the device and worse mobility as well as the drain current (I d ).…”

Experimental Observation of Record-high Electron Mobility of Greater than 1100 cm2V-1s-1 in Unstressed Si MOSFETs and Its Physical Mechanisms

“…In this study,  e of greater than 1000 cm 2 V -1 s -1 is demonstrated, for the first time, in unstressed Si MOSFETs, where accumulation-mode, body-channel SOI MOSFETs are used [3][4][5]. It is revealed that worse  e in conventional inversion-mode Si MOSFETs is primarily due to larger D ac at Si/SiO 2 interface [6] as well as the larger form factor induced by quantum confinement in 2D electron system.…”