2011
DOI: 10.1109/tcpmt.2011.2155655
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Fabrication of High Aspect Ratio TSV and Assembly With Fine-Pitch Low-Cost Solder Microbump for Si Interposer Technology With High-Density Interconnects

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Cited by 54 publications
(14 citation statements)
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“…Si was the initial material used for interposers because of its coefficient of thermal expansion (CTE) match to the Si chip and the familiarity of wafer fabrication facilities in Si processing. 1,2 Recently, glass has gained attention as a candidate interposer material. [3][4][5][6] The CTE of borosilicate glass, 3.2, is reasonably close to that of Si, 2.9, and a wide range of CTE's is available by changing the glass composition.…”
mentioning
confidence: 99%
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“…Si was the initial material used for interposers because of its coefficient of thermal expansion (CTE) match to the Si chip and the familiarity of wafer fabrication facilities in Si processing. 1,2 Recently, glass has gained attention as a candidate interposer material. [3][4][5][6] The CTE of borosilicate glass, 3.2, is reasonably close to that of Si, 2.9, and a wide range of CTE's is available by changing the glass composition.…”
mentioning
confidence: 99%
“…[12][13][14] In the case of Si, through vias (TSV) have been generated by first filling vias as blind vias, then thinning the back side of the wafer by CMP until the bottoms of the filled vias are intersected, thereby producing filled TSVs 2 or by first sealing one end of the TSVs then filling them as blind vias. 1 In the case of glass, where through-holes may be formed directly into the glass without the need for mechanical thinning, it is our intent to develop Cu plating processes to fill these holes as TGVs (open on both ends) instead of as blind vias. The aforementioned plating methods for filling of blind vias do not work well when directly applied to filling of TGVs, and a different approach is needed.…”
mentioning
confidence: 99%
“…Methods have been developed for creating Cu-filled through vias (TSVs) in Si interposers based on (i) blind via plating followed by back side wafer thinning until the via barrel is reached, 1 or (ii) for small diameter holes, "bottom up" filling after blocking one end of the hole by plating at high current density (CD). 2 Recently, glass interposers (GIs) have been attracting increased interest because of their lower cost and certain performance advantages. [3][4][5][6][7] Due to its lower thermal conductivity compared to Si, it is even more important to fill holes in glass with Cu to improve heat dissipation, and it would be desirable to do so by less cumbersome means than used for TSVs.…”
mentioning
confidence: 99%
“…One of the advantages of the bottom-up TSV approach is the ability to avoid seams or voids during via filling [28, 29]. Furthermore, the bottom-up process is suitable for via last scheme.…”
Section: Tsv Fillingmentioning
confidence: 99%