FinFET Mismatch in Subthreshold Region: Theory and Experiments

Magnone, Paolo; Crupi, Felice; Mercha, A.; Andricciola, Pietro; Tuinhout, H.P.; Lander, R.J.P.

doi:10.1109/ted.2010.2068430

Cited by 27 publications

(11 citation statements)

References 23 publications

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“…Due to both the exponential nature and the increased I D variability in this operating regime at cryogenic temperatures, Taylor expansion of Eq. (2) becomes impractical, thus making it more appropriate to use a logarithmic transform with base 10 [14], [17]:…”

Section: Modelingmentioning

confidence: 99%

“…Moreover, the validity of the Pelgrom area-scaling law for these three parameters is also assessed at both room and cryogenic temperatures. Furthermore, this work demonstrates a complete model of the drain-current mismatch, valid from the subthreshold to the strong inversion regime over the full temperature range from 300 K down to 4.2 K, which is obtained by combining the Croon model [26] and the subthreshold mismatch model [17].…”

Section: Introductionmentioning

confidence: 97%

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Subthreshold Mismatch in Nanometer CMOS at Cryogenic Temperatures

Hart

Babaie

Charbon

et al. 2020

IEEE J. Electron Devices Soc.

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Section: Modelingmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 97%

Subthreshold Mismatch in Nanometer CMOS at Cryogenic Temperatures

Hart

Babaie

Charbon

et al. 2020

IEEE J. Electron Devices Soc.

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“…4. The drain current fluctuations in the subthreshold region is not fully described by considering threshold voltage variations only, and subthreshold swing fluctuations need to be taken into account as well [15]. Static Noise Margin is determined by the relative strength (drain current) of N/P FETs in the SRAM cells.…”

Section: Impacts Of Ler and Wfv On Utb Soi Subthreshold Sram Cellsmentioning

confidence: 99%

Variability analysis of UTB SOI subthreshold SRAM considering Line-Edge Roughness, Work Function Variation and temperature sensitivity

Fan

et al. 2011

2011 IEEE International Conference on IC Design &Amp; Technology

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This paper analyzes stability and variability of Ultra-Thin-Body (UTB) SOI subthreshold SRAMs considering Line-Edge Roughness (LER), Work Function Variation (WFV) and temperature sensitivity. The intrinsic advantages of UTB SOI technology versus bulk CMOS technology with regard to the stability and variability of 6T SRAM cells for subthreshold operation are analyzed. Compared with LER, WFV causes comparable threshold voltage variation and much smaller subthreshold swing fluctuation, hence less impact on the UTB SOI subthreshold SRAMs. Even considering LER, the Lg = 40nm UTB SOI 6T subthreshold SRAM cells still provide sufficient margin (μRSNM/σRSNM > 6 at Vdd = 0.3~0.4V). Higher temperature increases the Vread,0 and decrease RSNM because of the degraded subthreshold swing. The RSNM of UTB SOI subthreshold SRAMs show less temperature sensitivity compared with that of bulk subthreshold SRAMs. Due to larger body effect, the back-gating technique is more efficient for the Lg = 40nm and 25nm UTB SOI subthreshold SRAMs compared with the bulk counterparts. By using lower threshold voltage devices with dual band-edge work functions, the Lg = 25nm UTB SOI subthreshold SRAMs show 31.9% reduction in σ RSNM and 55% improvement in μRSNM/σRSNM compared with that using single mid-gap work function.

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“…The two-injector model has shown reasonable accuracy for technology nodes down to 45nm, but for upcoming technologies new sources or variability become relevant such as drain induced barrier lowering or sub-threshold slope [7].…”

Section: Introductionmentioning

confidence: 99%

Four-injector variability modeling of FinFET predictive technology models

Royer

López‐Vallejo

Redondo

et al. 2014

2014 5th European Workshop on CMOS Variability (VARI)

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Abstract-The usual way of modeling variability using threshold voltage shift and drain current amplification is becoming inaccurate as new sources of variability appear in sub-22nm devices. In this work we apply the four-injector approach for variability modeling to the simulation of SRAMs with predictive technology models from 20nm down to 7nm nodes. We show that the SRAMs, designed following ITRS roadmap, present stability metrics higher by at least 20% compared to a classical variability modeling approach. Speed estimation is also pessimistic, whereas leakage is underestimated if sub-threshold slope and DIBL mismatch and their correlations with threshold voltage are not considered.

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FinFET Mismatch in Subthreshold Region: Theory and Experiments

Cited by 27 publications

References 23 publications

Subthreshold Mismatch in Nanometer CMOS at Cryogenic Temperatures

Subthreshold Mismatch in Nanometer CMOS at Cryogenic Temperatures

Variability analysis of UTB SOI subthreshold SRAM considering Line-Edge Roughness, Work Function Variation and temperature sensitivity

Four-injector variability modeling of FinFET predictive technology models

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