FinFET reliability study by forward gated-diode generation–recombination current

Abstract

Reliability of FinFETs is studied in this paper using the forward gated-diode generation-recombination (G-R) current. The current-voltage characteristics of a FinFET are measured for parameter extraction and a mathematical algorithm is used to extract the stress-induced interface states and oxide traps of the FinFET from the G-R current measurement. It is observed that the stress-induced interface states and oxide traps can be distinguished by observing the shift of the peak G-R current in the body current (I b ) versus gate voltage (V g ) characteristic. The interface states cause a change in the maximum G-R current ( I peak ) while the oxide traps result in a shift of the gate voltage ( V g ) corresponding to the I peak . Unlike bulk MOSFETs, the dominant degradation mechanism of FinFETs is found to be the oxide traps formation rather than the interface states generation.

The influence of total ionizing dose on the hot carrier injection of 22 nm bulk nFinFET

“…The FinFET with a small feature size has a strong internal electric field, thus the HCI can be significant. Some studies show that HCI is dependent on fin width [4] . Ma pointed out that parameter degradation caused by 14 nm FinFET HCI is mainly attributed to interface states, and the distribution of interface states on the top of FinFET fins is significantly less than that on the lateral wall of fins [5] .…”

Clear correspondence between gated-diode R–G current and performance degradation of SOI n-MOSFETs after F–N stress tests

“…However, traditional transistor reliability measurements monitor the shifts in the saturation drain current ∆I dsat , threshold gate voltage ∆V th , maximum trans-conductance ∆G m , and sub-threshold voltage swing ∆S of the MOSFET transistors [4,5] . Although the forward gated-diode method can also be well applied for studying the performance degradation of nano-scale FinFET devices [6] , for the purposes of simplification and obtaining a clear figure, a large-scale PD SOI device is used to demonstrate the anticipated dependences of these traditional characteristics on the forward gated-diode R-G current from experiments with MOSFET's F-N stress tests.…”