Finite state machine state assignment for area and power minimization

Sait, Sadiq M.; Khan, Faisal Aziz

doi:10.1109/iscas.2006.1693830

Cited by 20 publications

(41 citation statements)

References 12 publications

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“…Table 14 shows that SimE with Goodness measure-II is outperforming all other methods. In most cases, SimE results are better than those reported in [27] using MWHD (except for one circuit (shiftreg) when compared to results reported using Jedi). The values reported in table 14 are the average of five different runs.…”

Section: Cost Lit(sop)mentioning

confidence: 57%

“…Power minimization results are compared with results reported in [27] and Jedi tool using assignment options that gives best results. In [27] the authors are reporting power minimization using two methods; first by using MWHD and then by a measure called Fan-out which accounts for the size of the logic cones. Table 14 shows that SimE with Goodness measure-II is outperforming all other methods.…”

Section: Cost Lit(sop)mentioning

confidence: 99%

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FSM State-Encoding for Area and Power Minimization Using Simulated Evolution Algorithm

Sait

Oughali

Arafeh

2012

JART

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In this paper we describe the engineering of a non-deterministic iterative heuristic [1] known as simulated evolution(SimE) to solve the well-known NP-hard state assignment problem (SAP). Each assignment of a code to a state isgiven a Goodness value derived from a matrix representation of the desired adjacency graph (DAG) proposed byAmaral et.al [2]. We use the (DAGa) proposed in previous studies to optimize the area, and propose a new DAGpand employ it to reduce the power dissipation. In the process of evolution, those states that have high Goodness havea smaller probability of getting perturbed, while those with lower Goodness can be easily reallocated. States areassigned to cells of a Karnaugh-map, in a way that those states that have to be close in terms of Hamming distanceare assigned adjacent cells. Ordered weighed average (OWA) operator proposed by Yager [3] is used to combine thetwo objectives. Results are compared with those published in previous studies, for circuits obtained from the MCNCbenchmark suite. It was found that the SimE heuristic produces better quality results in most cases, and/or in lessertime, when compared to both deterministic heuristics and non-deterministic iterative heuristics such as GeneticAlgorithm.

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Section: Cost Lit(sop)mentioning

confidence: 57%

Section: Cost Lit(sop)mentioning

confidence: 99%

FSM State-Encoding for Area and Power Minimization Using Simulated Evolution Algorithm

Sait

Oughali

Arafeh

2012

JART

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“…MBE has a faster convergence rate than BPSO [22] in two out of the three compared circuits. However, although the convergence rate of GA [12] is slightly better, MBE converges to better solutions.…”

Section: Resultsmentioning

confidence: 99%

“…It is interesting to observe that for all compared circuits, the average results obtained by our MBE algorithm are better than those obtained by GA in [13] and SimE in [21]. In addition, for all compared circuits, except s1, the average results obtained by our MBE algorithm are better than those obtained by GA‐MWF [12]. Furthermore, they are also better than those obtained by TS [20] for all circuits, except s1 and tbk.…”

Section: Resultsmentioning

confidence: 99%

Majority‐based evolution state assignment algorithm for area and power optimisation of sequential circuits

El‐Maleh

2016

IET Computers & Digital Techniques

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“…Evolutionary algorithm (EA) [16] has been successfully applied in achieving low-area and low-power FSMs [17][18][19][20]. However, some researchers suspected the EAs in solving state assignment problem (SAP), which takes the entire subsequent step for low power including the logic synthesis, technology mapping and simulation, is practice and applicable.…”

Section: Introductionmentioning

confidence: 99%

MPGA: an evolutionary state assignment for dynamic and leakage power reduction in FSM synthesis

Tao

Zhang

Wang

et al. 2018

IET Computers & Digital Techniques

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As the development of deep-submicron and nano-technology, leakage power minimisation becomes as important as dynamic power reduction in IC design. In order to achieve low-power state assignment for finite-state machine (FSM) synthesis, a multi-population genetic algorithm (MPGA)-based state assignment method is proposed. MPGA consists of an outer-loop and a set of inner-GAs. In MPGA, inner-GA is a local search component for finding low-power state assignment. Selection, crossover and mutation are used to perform variations on individuals. Cost function is defined based on power dissipation formulation of complementary metal oxide semiconductor (CMOS) gate for dynamic power and leakage power estimation. The outer-loop is used to optimise the parameters of inner-genetic algorithm (GA) through population variation schema, intra-specific competition and newborn. Twenty-three FSMs that were commonly used as benchmarks are employed to test the effectiveness of MPGA and compare different state assignment methods. Experimental results show MPGA achieves a significant improvement over the previous publications both on dynamic power and leakage power reduction in most benchmarks.

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Finite state machine state assignment for area and power minimization

Cited by 20 publications

References 12 publications

FSM State-Encoding for Area and Power Minimization Using Simulated Evolution Algorithm

FSM State-Encoding for Area and Power Minimization Using Simulated Evolution Algorithm

Majority‐based evolution state assignment algorithm for area and power optimisation of sequential circuits

MPGA: an evolutionary state assignment for dynamic and leakage power reduction in FSM synthesis

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