2009
DOI: 10.1007/978-3-642-02490-0_137
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FPGA Implementation of an Evolving Spiking Neural Network

Abstract: Abstract. This research presents a Field Programmable Gate Array (FPGA) implementation of a taste recognition model. The model is based on simple integrate and fire neurons and facilitates an on-line learning. The whole system, including the hardware required to build (evolve) the network was hosted on one FPGA chip. The implementation used 45% of the logic elements, 76% of the memory, and 23% of the dedicated multiplier slices of the chip. FPGA size was sufficient for 64 neurons with up to 64 synapses each (a… Show more

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Cited by 6 publications
(5 citation statements)
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“…There are a large variety of general spiking neural network implementations in hardware [21], [86], [169], [323]- [570]. These implementations utilize a variety of neuron models such as the various integrate-and-fire neurons listed above or the more biologically-plausible or biologically-inspired models.…”
Section: Network Modelsmentioning
confidence: 99%
See 2 more Smart Citations
“…There are a large variety of general spiking neural network implementations in hardware [21], [86], [169], [323]- [570]. These implementations utilize a variety of neuron models such as the various integrate-and-fire neurons listed above or the more biologically-plausible or biologically-inspired models.…”
Section: Network Modelsmentioning
confidence: 99%
“…They can also be used to optimize within the characteristics and peculiarities of a particular hardware implementation (or even the characteristics and peculiarities of a particular hardware device instance). Off-chip naturebased implementations include differential evolution [1321]- [1324], evolutionary or genetic algorithms [484]- [487], [512], [570], [680], [700], [1076], [1082]- [1085], [1092], [1325]- [1337], and particle swarm optimization [1338]. We explicitly specify these off-chip methods because all of the nature-based implementations rely on evaluations of a current network solution and can utilize the chip during the training process (as a chip-in-the-loop method).…”
Section: A Supervised Learningmentioning
confidence: 99%
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“…Generally, eSNN reported promising results on both large and small datasets, which has motivated an FPGA hardware implementation of the system [91].…”
Section: Taste Recognitionmentioning
confidence: 99%
“…Most of the attention has been focused on: (a) the design of new spiking neuron models; 2-4 (b) information encoding; [5][6][7][8][9] (c) training algorithms; [10][11][12] (d) applications [13][14][15] and (e) hardware implementations. [16][17][18][19] SNNs have the ability to solve real world problems for which no solution is known. Unfortunately, only a small amount of SNNs have knowledge extraction facilities 20 to indicate how the problem was solved and the decision was made.…”
Section: Introductionmentioning
confidence: 99%