Future trends for TFT integrated circuits on glass substrates

Ohshima, Hiroyuki; Morozumi, Shinji

doi:10.1109/iedm.1989.74250

Cited by 75 publications

(19 citation statements)

References 6 publications

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“…It also results in improvement of the connection reliability of the mounted parts. Secondly, the circuits can be manufactured in simple, fewer fabrication process, because TFTs have similar structures as SOI (Silicon on Insulator) and device isolation is not required, and peripheral circuits and displays are simultaneously made [4]. Thirdly, since the LTPS-TFTs can be manufactured with an inexpensive and large-sized glass substrate, low-cost and large size screens can be easily achieved [3].…”

Section: Introductionmentioning

confidence: 99%

Digital integrated circuit design for system-on-glass

Ikai

Kim

Ikeda

et al. 2008

2008 International SoC Design Conference

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In this paper, we have developed a design environment for a stripe-shaped PMELA process and have designed digital circuits such as a serial-to-parallel converter and a PRBS generator as examples of digital VLSI circuits. The designed circuits and standard cells are fabricated in bulk CMOS process and are verified their operations. The whole circuits are fabricated in PMELA 0.5μm CMOS technology with 1-poly-Si 1-Metal layers on glass. The measurement results show that digital circuits using PMELA TFTs are successfully integrated on glass by using this design environment.

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Section: Introductionmentioning

confidence: 99%

Digital integrated circuit design for system-on-glass

Ikai

Kim

Ikeda

et al. 2008

2008 International SoC Design Conference

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“…Low-temperature polycrystalline-silicon (LTPS) thin-film transistors (TFTs) are promising devices for realizing the goal of system on panel (SOP). However, besides presuming the display performance of pixel arrays, the related peripheral circuits and embedded memories of these displays tend to be integrated within the same glass substrate with low cost and high performance [2], [3]. One of the main components of SOP is the process compatible nonvolatile memory, which can be applied in circuit level adjustment, voltage trimming, and even for the mass storage of complicate display parameters [4], [5].…”

Section: Introductionmentioning

confidence: 99%

A New Embedded One-Time-Programmable MNOS Memory Fully Compatible to LTPS Fabrication for System-on-Panel (SOP) Applications

Lee

Chiu

Liu

et al. 2008

IEEE Electron Device Lett.

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A metal-nitride-oxide-silicon (MNOS) one-time-programmable cell with fast programming, high reliability, and fully low-temperature polycrystalline-silicon (LTPS) panel compatible process has been proposed for system-on-panel applications. This cell adopting tunneling programming scheme has a very wide reading window with superior program efficiency. Furthermore, fast program efficiency and high disturb immunity are both obtained in the LTPS panel technology by a divided voltage operation. Through channel FN programming, superior data retention and low-power operation are therefore achieved. The new embedded MNOS cell has provided a promising one-time-programming memory solution on the LTPS panels' applications.Index Terms-Fully compatible, low-temperature polycrystalline silicon (LTPS), one-time programmable (OTP), thin-film transistor (TFT).

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“…P OLYCRYSTALLINE silicon (poly-Si) thin-film transistors (TFTs) have been widely used to integrate driver circuits for active-matrix liquid crystal displays and active-matrix organic light-emitting-diode displays due to their higher fieldeffect mobility and driving current compared to other structures of a TFT [1], [2]. In order to integrate peripheral driving circuits on a glass substrate, a low-temperature process (∼ 600 • C) that does not compromise the device performance should be developed.…”

Section: Introductionmentioning

confidence: 99%

High-Performance Polycrystalline Silicon TFT on the Structure of a Dopant-Segregated Schottky-Barrier Source/Drain

Choi

Han

Kim

et al. 2010

IEEE Electron Device Lett.

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A high-performance polycrystalline silicon (poly-Si) thin-film transistor (TFT) with Schottky-barrier (SB) source/drain (S/D) junctions is proposed. A p-channel operation on the intrinsic nickel (Ni) silicided S/D was successfully realized with the aid of a thin active layer, despite the fact that the Ni silicided material shows a high SB height (SBH) for holes. Furthermore, for n-channel operation, the dopant-segregation technique implemented on the intrinsic Ni silicide was utilized to reduce the effective SBH for electrons. The results show a higher on-current due to the lower parasitic resistance as well as superior immunity against short-channel effects, compared to the conventional poly-Si TFT composed of p-n S/D junctions. Index Terms-Dopant-segregated Schottky barrier (DSSB), dopant segregation (DS), high performance, MOSFET, Ni silicide, Schottky barrier (SB), thin body, thin-film transistors (TFTs).

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Future trends for TFT integrated circuits on glass substrates

Cited by 75 publications

References 6 publications

Digital integrated circuit design for system-on-glass

Digital integrated circuit design for system-on-glass

A New Embedded One-Time-Programmable MNOS Memory Fully Compatible to LTPS Fabrication for System-on-Panel (SOP) Applications

High-Performance Polycrystalline Silicon TFT on the Structure of a Dopant-Segregated Schottky-Barrier Source/Drain

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