Gate voltage dependence on hot carrier degradation at an elevated temperature in a device with ultrathin silicon oxynitride

Abstract

Effect of substrate hot-carrier injection on quasibreakdown of ultrathin gate oxide

Effect of electron–electron scattering at an elevated temperature on device lifetime of nanoscale nMOSFETs

“…Abramo et al reported that the high-energy tail was enhanced substantially both in the channel and inside the drain region [8]. Although EES stress causes severe device degradation, CHC stress results in more critical damage because CHC stress generates more interface states than EES stress [3]. However, the device degradation by EES stress increases dramatically when the channel length is scaled down due to the enhanced high-energy tail.…”

“…Therefore, stress effect of EES on device lifetime should be investigated. Jo et al compared CHC (V g = V d ) and EES (V g > V d ) stresses, and reported that high-energy tail electrons caused severe damage to an nMOSFET by enhancing interface states [3]. Abramo et al reported that the high-energy tail was enhanced substantially both in the channel and inside the drain region [8].…”

“…However, low bias HC stress has been reported to cause severe damage to devices [3,[7][8][9]. In particular, a few researchers reported severe degradation of devices under low V d with high temperature because of electron-electron scattering (EES) [7][8][9].…”

“…As the dimensions of the MOS transistor are scaled down, the condition for maximum hot carrier (HC) degradation shifts from drain avalanche hot-carrier stress to channel hot-carrier (CHC) stress [1][2][3]. Several researchers have studied CHC effects over a large range of both gate V g and drain voltages V d [4,5].…”

“…Several researchers have studied CHC effects over a large range of both gate V g and drain voltages V d [4,5]. According to these studies, CHC stress is the worst stress condition for a short channel device [1][2][3][4][5].…”