Hierarchical Temporal Memory Features with Memristor Logic Circuits for Pattern Recognition

Krestinskaya, Olga; Ibrayev, Timur; James, Alex Pappachen

doi:10.1109/tcad.2017.2748024

Cited by 59 publications

(98 citation statements)

References 19 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…The ORCID identification number(s) for the author(s) of this article can be found under https://doi.org/10.1002/smtd.201900160. DOI: 10.1002/smtd.201900160 of neuromorphic system learning by employing memristive ANNs for applications such as pattern recognition, [8][9][10][11] classification, [12] and clustering. [13] Among them, pattern recognition is an important task for developing intelligent computers capable of assisting or replacing humans in dangerous or tedious tasks.…”

mentioning

confidence: 99%

Analog–Digital Hybrid Memristive Devices for Image Pattern Recognition with Tunable Learning Accuracy and Speed

et al. 2019

View full text Add to dashboard Cite

Brain‐inspired memristive artificial neural networks (ANNs) have been identified as a promising technology for pattern recognition tasks. To optimize the performance of ANNs in various applications, a recognition system with tunable accuracy and speed is highly desirable. A single WO3−x‐based memristor is presented in which analog and digital resistive switching (A‐RS and D‐RS) coexist according to a selectively executed forming process. The A‐RS and D‐RS mechanisms can be attributed to the modulation of the Schottky barrier on the interface and the formation/rupture of conducting filaments inside the film, respectively. More importantly, a new analog–digital hybrid ANN is developed based on the coexistence of A‐RS and D‐RS in the WO3−x memristor, enabling tunable learning accuracy and speed in pattern recognition. The spike‐timing‐dependent plasticity learning rules, as a learning base for image pattern recognition, are demonstrated using A‐RS and D‐RS devices with obviously different fluctuations and rates of change. The learning accuracy/speed can be improved by increasing the proportion of A‐RS/D‐RS in the crossbar array. A convenient method is provided for selecting an optimized pattern recognition scheme to meet different application situations.

show abstract

mentioning

confidence: 99%

Analog–Digital Hybrid Memristive Devices for Image Pattern Recognition with Tunable Learning Accuracy and Speed

et al. 2019

View full text Add to dashboard Cite

show abstract

“…The HTM SP consists of four main phases: (1) initialization, (2) overlap, (3) inhibition, and (4) learning. There are several hardware implementations proposed for the HTM SP, such as conventional HTM SP [39] and modified HTM SP [40]. Both architectures are based on memristive devices located in the initialization and overlap stages.…”

Section: Background a Learning Algorithms And Biologically Inspimentioning

confidence: 99%

Learning in Memristive Neural Network Architectures Using Analog Backpropagation Circuits

Krestinskaya

Salama

James

2019

IEEE Trans. Circuits Syst. I

Self Cite

128

View full text Add to dashboard Cite

The on-chip implementation of learning algorithms would speed-up the training of neural networks in crossbar arrays. The circuit level design and implementation of backpropagation algorithm using gradient descent operation for neural network architectures is an open problem. In this paper, we proposed the analog backpropagation learning circuits for various memristive learning architectures, such as Deep Neural Network (DNN), Binary Neural Network (BNN), Multiple Neural Network (MNN), Hierarchical Temporal Memory (HTM) and Long-Short Term Memory (LSTM). The circuit design and verification is done using TSMC 180nm CMOS process models, and TiO2 based memristor models. The application level validations of the system are done using XOR problem, MNIST character and Yale face image databases.

show abstract

“…There are several hardware implementations of HTM. In this work, we explore analog hardware implementation of modified memristive HTM proposed in [9] and represented in Fig. 1 (c).…”

Section: Quality Inspectionmentioning

confidence: 99%

“…In this paper, we investigate and compare the application of neuromorphic architectures for wafer quality inspection. We present the performance analysis and comparison of wafer classification accuracy, on-chip area and power consumption of a single Perceptron [4], a three-layer Artificial Neural Network (ANN) [5], Long short-term memory (LSTM) neural netwrok [6], Deep Neural Network (DNN) [7], [8] and Hierarchical Temporal Memory (HTM) [9]. The performance of neuromorphic architectures is tested using the database of wafer parameters from [10], consisting of two classes of time-series data obtained during measurement of inline semiconductor processing.…”

Section: Introductionmentioning

confidence: 99%

Wafer Quality Inspection using Memristive LSTM, ANN, DNN and HTM

Adam

Smagulova

Krestinskaya

et al. 2018

2018 IEEE Electrical Design of Advanced Packaging and Systems Symposium (EDAPS)

Self Cite

View full text Add to dashboard Cite

The automated wafer inspection and quality control is complex and time consuming task, which can be speed up using neuromorphic memristive architectures, as a separate inspection device or integrating directly into sensors. This paper presents the performance analysis and comparison of different neuromorphic architectures for patterned wafer quality inspection and classification. The application of non-volatile memristive devices in these architectures ensures low power consumption, small on-chip area scalability. We demonstrate that Long-Short Term Memory (LSTM) outperforms other architectures for the same number of training iterations, and has relatively low on-chip area and power consumption.

show abstract

Hierarchical Temporal Memory Features with Memristor Logic Circuits for Pattern Recognition

Cited by 59 publications

References 19 publications

Analog–Digital Hybrid Memristive Devices for Image Pattern Recognition with Tunable Learning Accuracy and Speed

Analog–Digital Hybrid Memristive Devices for Image Pattern Recognition with Tunable Learning Accuracy and Speed

Learning in Memristive Neural Network Architectures Using Analog Backpropagation Circuits

Wafer Quality Inspection using Memristive LSTM, ANN, DNN and HTM

Contact Info

Product

Resources

About