High-frequency AC characteristics of 1.5 nm gate oxide MOSFETs

Momose, H.S.; Morifuji, E.; Yoshitomi, T.; Saito, Isao; Morimoto, T.; Katsumata, Y.; Iwai, Hiroshi

doi:10.1109/iedm.1996.553132

Cited by 74 publications

(24 citation statements)

References 2 publications

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“…The scaling of CMOS technology with improved RF FOMs has made it attractive for system-on-chip (SoC) applications, where the analog circuits are realized with the digital circuits in the same integrated circuit (IC) to reduce the cost and improve the performance [28,29]. Although several physics-based analysis have been reported related to the d.c. properties of the SRG MOSFET, the limitations or degradation of the RF characteristics along the downscaling of the channel length has only been described by a few authors [30,31].…”

Section: Introductionmentioning

confidence: 99%

Analog and RF performance investigation of cylindrical surrounding-gate MOSFET with an analytical pseudo-2D model

Sarkar

De²,

Dey

et al. 2012

J Comput Electron

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We report a systematic, quantitative investigation of analog and RF performance of cylindrical surroundinggate (SRG) silicon MOSFET. To derive the model, a pseudotwo-dimensional (2-D) approach applying Gauss's law in the channel region is extended for the cylindrical SRG MOSFET. Based on surface potential approach, expressions of drain current and differential capacitances are obtained analytically. Analog/RF figures of merit of SRG MOSFET are studied, including transconductance efficiency g m /I d , intrinsic gain, output resistance, cutoff frequency f T , maximum oscillation frequency f max and gain bandwidth product GBW. The trends related to their variations along the downscaling of dimension are provided. In order to validate our model, the modeled predictions have been extensively compared with the simulated characteristics obtained from the ATLAS device simulator and a nice agreement is observed with a wide range of geometrical parameters.

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Section: Introductionmentioning

confidence: 99%

Analog and RF performance investigation of cylindrical surrounding-gate MOSFET with an analytical pseudo-2D model

Sarkar

De²,

Dey

et al. 2012

J Comput Electron

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“…Vandamme@imec. de. traction of pad parasitics from the S-parameter measurements, (2) to provide enough signal to the network analyzer which has a limited dynamic range, e.g., S 12 must be larger than the system's noise floor, and (3) to ensure high enough transistor gain and output power. However, the larger the MOSFET channel width the larger the influence of a (degrading) contact resistance between RF probe and bonding pad on the electrical characteristics of the transistor.…”

Section: Introductionmentioning

confidence: 99%

“…Both RF MOSFET modelling and RF reliability assessment require dedicated on-wafer test structures. Typically, these test structures include MOS transistors with a total channel width of 100 µm or more [2,3]. These large channel widths are needed mainly for three reasons: (1) to reduce the inaccuracy of de-embedding, i.e., the subCorrespondence to: E. P. Vandamme; e-mail: Ewout.…”

Section: Introductionmentioning

confidence: 99%

Impact of probe-to-pad contact degradation on the high frequency characteristics of RF MOSFETs and guidelines to avoid it

Vandamme

Schreurs

Dinther

2001

Int J RF and Microwave Comp Aid Eng

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Apparent degradation of the RF characteristics of silicon MOSFETs was observed under normal operating conditions. We show that it was not caused by intrinsic device degradation but originated from a degradation of the contact resistance between probe and bonding pad. Guidelines, not limited to MOSFETs only, are given that enable accurate S-parameter measurements for RF modelling and reliability assessment.

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“…This is mainly due to the fact bipolar junction transistors (BJT's) and GaAs MESFET devices have historically always been used for high-speed applications because of their relatively high unity gain cut off frequency However, advances in CMOS processing technology have continued to reduce the minimum channel length of the MOS device, consequently increasing the of the transistor. For example, a deep submicron CMOS technology has realized devices with 's exceeding 100 GHz and minimum noise figures less than 0.5 dB at 2 GHz [1]. There have been several reports in the literature demonstrating front-end designs within a CMOS environment (e.g., [2]- [5]).…”

Section: Introductionmentioning

confidence: 99%

High-frequency dependence of channel noise in short-channel RF MOSFETs

Manku

Obrecht²,

Lin³

1999

IEEE Electron Device Lett.

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Using a two-dimensional (2-D) Green's function technique, similar to Shockley's impedance field technique, simulation results of the drain i d and gate induced i g channel noise are presented for an nMOS transistor as a function of frequency. The simulation results show that for frequencies much lower than the cutoff frequency of the transistor ft the correlation factor (i.e., i g i 3 d = i 2 g i 2 d ) between the drain and gate channel noise is equal to approximately 0.4j: For frequencies near the ft of the device the correlation factor approximately equals 0.3j: For f =ft 0:3; the contribution of the gate induced noise compared to the drain noise was found to be on the order of 1% (i.e., i 2 g =i 2 d (ft=f ) 2 ): Index Terms-High frequency noise, MOSFET, RF MOS.

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High-frequency AC characteristics of 1.5 nm gate oxide MOSFETs

Cited by 74 publications

References 2 publications

Analog and RF performance investigation of cylindrical surrounding-gate MOSFET with an analytical pseudo-2D model

Analog and RF performance investigation of cylindrical surrounding-gate MOSFET with an analytical pseudo-2D model

Impact of probe-to-pad contact degradation on the high frequency characteristics of RF MOSFETs and guidelines to avoid it

High-frequency dependence of channel noise in short-channel RF MOSFETs

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