High Temperature Reliability Investigations of EEPROM Memory Cells Realised in Silicon-on-Insulator (SOI) Technology

Abstract

Microelectronic manufacturing progresses not only towards further miniaturisation, but also application fields tend to become more and more diverse. Recently there has been an increasing demand for electronic devices and circuits that function in harsh environments such as high temperatures. Under these conditions, reliability aspects are highly critical and testing remains a great challenge. A versatile CMOS process based on 200 mm thin film Silicon-on-Insulator (SOI) wafers is in production at Fraunhofer IMS. It features three layers of tungsten metallisation for optimum electromigration reliability, voltage independent capacitors, high resistance resistors and single-poly-EEPROM cells. Non-volatile memories such as EEPROMs are a key technology that enables flexible data storage, for example of calibration and measurement information. The reliability of these devices is especially crucial in high temperature applications since charge loss is drastically increased in this case. The behaviour of single-poly-EEPROM cells, produced in the process described before, was evaluated up to 450 °C. Data retention tests at temperatures ranging from 160 °C to 450 °C and write/erase cycling tests up to 400 °C were performed. The dependence of write/erase cycling on both temperature and tunnel oxide thickness was studied. These data provide an important foundation to extend the application of high temperature electronics to its maximum limits. The results show that EEPROM cells can be used for special applications even at temperatures higher than 250 °C.

Design of a Temperature-Aware Low-Voltage SRAM With Self-Adjustable Sensing Margin Enhancement for High-Temperature Applications up to 300 °C

“…The development of ruggedized electronics such as automotive, aerospace and Logging-While-Drilling (LWD) systems has demanded more robust integrated circuit solutions with reliable operation at high temperatures (> 200C) [1]- [4]. One of the most challenging issues in circuit design for high temperature operation is leakage, which increases exponentially with temperature.…”

“…One of the most challenging issues in circuit design for high temperature operation is leakage, which increases exponentially with temperature. Silicon-on-Insulator (SOI) technology has been preferred for high temperature applications due to the feature of lower leakage compared with bulk CMOS technology [4]. The SOI technology significantly reduces the junction area and accordingly the leakage.…”

“…Several analog and digital circuits operating at the temperature up to 300C have been demonstrated [2], [4], [6], [7]. Davis et al implemented a 14-bit  modulator in standard CMOS, which is capable of 14-bit resolution at 225C [2].…”

“…Gogl et al presented an EEPROM with the operating temperature up to 250C with the aid of SIMOX technology [1], [5]. In [4], Grella et al experimentally demonstrated that EEPROMs can operate up to 400C even though the threshold voltage window and the storage time are degraded dramatically. Recently, nano-electro-mechanical (NEM) devices using electromechanical contacts have been explored for high temperature data storage due to the ideally zero leakage current [8]- [10].…”

Tantalum-Nitride Antifuse Electromechanical OTP for Embedded Memory Applications

“…The leading NVM technology is based on floating gate transistors, which, however, have limited performances when exposed to high temperature (T > 200°C) [1], mostly because of charge leakage. Various designs of storage-layer-free electromechanical NVM actuated by electrostatic forces are proposed [2]- [4].…”