2019
DOI: 10.3390/jimaging5030034
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High-Throughput Line Buffer Microarchitecture for Arbitrary Sized Streaming Image Processing

Abstract: Parallel hardware designed for image processing promotes vision-guided intelligent applications. With the advantages of high-throughput and low-latency, streaming architecture on FPGA is especially attractive to real-time image processing. Notably, many real-world applications, such as region of interest (ROI) detection, demand the ability to process images continuously at different sizes and resolutions in hardware without interruptions. FPGA is especially suitable for implementation of such flexible streamin… Show more

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Cited by 6 publications
(5 citation statements)
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“…The buffers of different lengths should be designed for different data array sizes. It is proposed to use a universal buffer, which is adjusted to the array size and the computed frame in it with the possibility of dynamic reconfiguration [26]. A similar method for image processing is described in [27], which is capable of transposing the position of pixels in the frame, as well as performing image correction at the frame edges.…”
Section: Methods For the Buffer Designmentioning
confidence: 99%
“…The buffers of different lengths should be designed for different data array sizes. It is proposed to use a universal buffer, which is adjusted to the array size and the computed frame in it with the possibility of dynamic reconfiguration [26]. A similar method for image processing is described in [27], which is capable of transposing the position of pixels in the frame, as well as performing image correction at the frame edges.…”
Section: Methods For the Buffer Designmentioning
confidence: 99%
“…Buffers of different lengths should be designed for different image sizes. In work [14], it is proposed to use a universal buffer that can be adjusted to the size of the frame and aperture with the possibility of dynamic reconfiguration. A similar buffer is described in [15], which is additionally capable of transposing the position of pixels in the window, as well as performing image correction at its edges.…”
Section: Literature Reviewmentioning
confidence: 99%
“…This works well when the image size is fixed, and is known in advance. Two situations where this approach is less effective [ 3 ] are in the region of interest processing, where only a small region of the image is processed (usually determined from the image contents at run-time), and cloud processing of user-uploaded images (which may be of arbitrary size). This is complicated further in high-speed systems, where the real-time requirements demand processing multiple pixels in every clock cycle, because, if the line width is not a multiple of the number of pixels processed each cycle, then it is necessary to assemble the output window pixels from more than one memory block.…”
Section: Contributionsmentioning
confidence: 99%
“…This is complicated further in high-speed systems, where the real-time requirements demand processing multiple pixels in every clock cycle, because, if the line width is not a multiple of the number of pixels processed each cycle, then it is necessary to assemble the output window pixels from more than one memory block. Shi et al [ 3 ], in their paper, extend their earlier work on assembling the output window to allow arbitrary image widths. The resulting line buffer must be configurable at run-time, which is achieved through a series of “instructions”, which control the assembly of the output processing window when the required data spans two memory blocks.…”
Section: Contributionsmentioning
confidence: 99%